Fix onnx test failure with new LLVM

Xilinx · Aug 22, 2024 · b471d56 · b471d56
1 parent 9e4cd9d
commit b471d56
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diff --git a/test/mlir/conversion/krnl_to_affine/krnl_to_affine_with_canonicalize.mlir b/test/mlir/conversion/krnl_to_affine/krnl_to_affine_with_canonicalize.mlir
@@ -127,7 +127,7 @@ func.func @prefetch(%arg0: memref<256x512xf32>) -> memref<256x512xf32> attribute
 // CHECK:           affine.for [[I_0_:%.+]] = 0 to 256 {
 // CHECK:             affine.for [[I_1_:%.+]] = 0 to 512 {
 // CHECK:               [[LOAD_PARAM_0_MEM_:%.+]] = affine.load [[PARAM_0_]]{{.}}[[I_0_]], [[I_1_]]{{.}} : memref<256x512xf32>
-// CHECK:               affine.prefetch [[PARAM_0_]]{{.}}[[I_0_]], [[I_1_]] + 64], write, locality<0>, data : memref<256x512xf32>
+// CHECK:               affine.prefetch [[PARAM_0_]]{{.}}[[I_0_]], [[I_1_]] + 64], read, locality<3>, data : memref<256x512xf32>
 // CHECK:               [[LOAD_PARAM_0_MEM_1_:%.+]] = affine.load [[PARAM_0_]]{{.}}[[I_0_]], [[I_1_]]{{.}} : memref<256x512xf32>
 // CHECK:               [[VAR_2_:%.+]] = arith.addf [[LOAD_PARAM_0_MEM_]], [[LOAD_PARAM_0_MEM_1_]] : f32
 // CHECK:               affine.store [[VAR_2_]], [[RES_]]{{.}}[[I_0_]], [[I_1_]]{{.}} : memref<256x512xf32>

diff --git a/utils/clone-mlir.sh b/utils/clone-mlir.sh
@@ -1,3 +1,3 @@
 git clone -n https://github.com/xilinx/llvm-project.git
 # Check out a specific branch that is known to work with ONNX-MLIR.
-cd llvm-project && git checkout a074d693f166574b4ef25e96bf2f29686a5de740 && cd ..
+cd llvm-project && git checkout aec0fbb27815 && cd ..