[Target] Use getConstantOperandAPInt (NFC)

XinWang10 · Jan 11, 2024 · be76f16 · be76f16
1 parent 12bba0d
commit be76f16
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Showing 4 changed files with 7 additions and 13 deletions.
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4513,8 +4513,7 @@ static SDValue skipExtensionForVectorMULL(SDValue N, SelectionDAG &DAG) {
  SDLoc dl(N);
  SmallVector<SDValue, 8> Ops;
  for (unsigned i = 0; i != NumElts; ++i) {
- ConstantSDNode *C = cast<ConstantSDNode>(N.getOperand(i));
- const APInt &CInt = C->getAPIntValue();
+ const APInt &CInt = N.getConstantOperandAPInt(i);
  // Element types smaller than 32 bits are not legal, so use i32 elements.
  // The values are implicitly truncated so sext vs. zext doesn't matter.
  Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), dl, MVT::i32));

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -9577,8 +9577,7 @@ static SDValue SkipExtensionForVMULL(SDNode *N, SelectionDAG &DAG) {
  SmallVector<SDValue, 8> Ops;
  SDLoc dl(N);
  for (unsigned i = 0; i != NumElts; ++i) {
- ConstantSDNode *C = cast<ConstantSDNode>(N->getOperand(i));
- const APInt &CInt = C->getAPIntValue();
+ const APInt &CInt = N->getConstantOperandAPInt(i);
  // Element types smaller than 32 bits are not legal, so use i32 elements.
  // The values are implicitly truncated so sext vs. zext doesn't matter.
  Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), dl, MVT::i32));
@@ -18080,8 +18079,7 @@ SDValue ARMTargetLowering::PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &D
 
  SDValue Op0 = CMOV->getOperand(0);
  SDValue Op1 = CMOV->getOperand(1);
- auto CCNode = cast<ConstantSDNode>(CMOV->getOperand(2));
- auto CC = CCNode->getAPIntValue().getLimitedValue();
+ auto CC = CMOV->getConstantOperandAPInt(2).getLimitedValue();
  SDValue CmpZ = CMOV->getOperand(4);
 
  // The compare must be against zero.
@@ -20109,8 +20107,7 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
 
  // The operand to BFI is already a mask suitable for removing the bits it
  // sets.
- ConstantSDNode *CI = cast<ConstantSDNode>(Op.getOperand(2));
- const APInt &Mask = CI->getAPIntValue();
+ const APInt &Mask = Op.getConstantOperandAPInt(2);
  Known.Zero &= Mask;
  Known.One &= Mask;
  return;

diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2019,9 +2019,7 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
  DL, RetTy, Args, Outs, retAlignment,
  HasVAArgs
  ? std::optional<std::pair<unsigned, const APInt &>>(std::make_pair(
- CLI.NumFixedArgs,
- cast<ConstantSDNode>(VADeclareParam->getOperand(1))
- ->getAPIntValue()))
+ CLI.NumFixedArgs, VADeclareParam->getConstantOperandAPInt(1)))
  : std::nullopt,
  *CB, UniqueCallSite);
  const char *ProtoStr = nvTM->getStrPool().save(Proto).data();

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4822,8 +4822,8 @@ static bool getTargetConstantBitsFromNode(SDValue Op, unsigned EltSizeInBits,
 
  APInt UndefSrcElts(NumSrcElts, 0);
  SmallVector<APInt, 64> SrcEltBits;
- auto *CN = cast<ConstantSDNode>(Op.getOperand(0).getOperand(0));
- SrcEltBits.push_back(CN->getAPIntValue().zextOrTrunc(SrcEltSizeInBits));
+ const APInt &C = Op.getOperand(0).getConstantOperandAPInt(0);
+ SrcEltBits.push_back(C.zextOrTrunc(SrcEltSizeInBits));
  SrcEltBits.append(NumSrcElts - 1, APInt(SrcEltSizeInBits, 0));
  return CastBitData(UndefSrcElts, SrcEltBits);
  }