Fix for issue ARM-software/bsa-acs#262 (ARM-software#465)

- Removing test 840 as it is removed from Spec - The spec is updated to remove this from BSA and now part of SBSA specification - Errata mantis 446 Change-Id: I3b6592494d69b310136ba410eb20c2c25793fd70 Signed-off-by: Gowtham Siddarth <gowtham.siddarth@arm.com> Co-authored-by: Gowtham Siddarth <gowtham.siddarth@arm.com>
ajayswar-s · May 27, 2024 · e00e433 · e00e433
1 parent cb4d563
commit e00e433
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diff --git a/docs/arm_sbsa_testcase_checklist.rst b/docs/arm_sbsa_testcase_checklist.rst
@@ -194,6 +194,8 @@ The below table provides the following details
 |838    |Check CTRS and CTDS rule                    |L6   |IE_REG_4                                            |Yes             |Yes |Yes       |No   |No                 |
 +-------+--------------------------------------------+-----+----------------------------------------------------+----------------+----+----------+-----+-------------------+
 |839    |Check i-EP atomicop rule                    |L6   |IE_REG_2                                            |Yes             |Yes |Yes       |No   |No                 |
++-------+--------------------------------------------+----------------------------------------------------------+----------------+----+----------+-----+-------------------+
+|840    |PCIe RC,PE - Same Inr Shareable Domain      |L3   |PCI_IC_11                                           |Yes             |Yes |Yes       |No   |No                 |
 +-------+--------------------------------------------+-----+----------------------------------------------------+----------------+----+----------+-----+-------------------+
 |841    |Check MSI and MSI-X support rule            |L6   |RE_INT_1, IE_INT_1                                  |Yes             |Yes |Yes       |No   |No                 |
 +-------+--------------------------------------------+-----+----------------------------------------------------+----------------+----+----------+-----+-------------------+

diff --git a/test_pool/pcie/operating_system/test_p040.c b/test_pool/pcie/operating_system/test_p040.c
@@ -0,0 +1,76 @@
+/** @file
+ * Copyright (c) 2016-2018, 2021, 2023-2024, Arm Limited or its affiliates. All rights reserved.
+ * SPDX-License-Identifier : Apache-2.0
+
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ **/
+
+#include "val/common/include/acs_val.h"
+#include "val/common/include/acs_iovirt.h"
+
+#define TEST_NUM   (ACS_PCIE_TEST_NUM_BASE + 40)
+#define TEST_RULE  "PCI_IC_11"
+#define TEST_DESC  "PCIe RC,PE - Same Inr Shareable Domain"
+
+#define INNER_SHAREABLE 1
+
+static void
+payload(void)
+{
+  uint32_t num_pcie_rc;
+  uint32_t mem_attr;
+  uint32_t index = val_pe_get_index_mpid (val_pe_get_mpid());
+
+  num_pcie_rc = val_iovirt_get_pcie_rc_info(NUM_PCIE_RC, 0);
+
+  if (!num_pcie_rc) {
+     val_print(ACS_PRINT_DEBUG, "\n       Skip because no PCIe RC detected  ", 0);
+     val_set_status(index, RESULT_SKIP(TEST_NUM, 1));
+     return;
+  }
+
+  while (num_pcie_rc) {
+      num_pcie_rc--;   // Index is one lesser than the component number being accessed
+      mem_attr = val_iovirt_get_pcie_rc_info(RC_MEM_ATTRIBUTE, num_pcie_rc);
+
+      if (mem_attr == INNER_SHAREABLE)
+         val_set_status(index, RESULT_PASS(TEST_NUM, 1));
+      else {
+         val_print(ACS_PRINT_ERR,
+                 "\n       Failed mem attribute check for PCIe RC %d", num_pcie_rc);
+         val_set_status(index, RESULT_FAIL(TEST_NUM, 1));
+         return;
+      }
+  }
+
+}
+
+uint32_t
+p040_entry(uint32_t num_pe)
+{
+
+  uint32_t status = ACS_STATUS_FAIL;
+
+  num_pe = 1;  //This test is run on single processor
+
+  status = val_initialize_test(TEST_NUM, TEST_DESC, num_pe);
+  if (status != ACS_STATUS_SKIP)
+      val_run_test_payload(TEST_NUM, num_pe, payload, 0);
+
+  /* get the result from all PE and check for failure */
+  status = val_check_for_error(TEST_NUM, num_pe, TEST_RULE);
+
+  val_report_status(0, ACS_END(TEST_NUM), NULL);
+
+  return status;
+}
diff --git a/uefi_app/SbsaAvs.inf b/uefi_app/SbsaAvs.inf
@@ -103,6 +103,7 @@
   ../test_pool/pcie/operating_system/test_p037.c
   ../test_pool/pcie/operating_system/test_p038.c
   ../test_pool/pcie/operating_system/test_p039.c
+  ../test_pool/pcie/operating_system/test_p040.c
   ../test_pool/pcie/operating_system/test_p041.c
   ../test_pool/pcie/operating_system/test_p042.c
   ../test_pool/pcie/operating_system/test_p043.c
@@ -227,4 +228,4 @@
 
 [BuildOptions]
   GCC:*_*_*_ASM_FLAGS  =  -march=armv8.1-a
-  GCC:*_*_*_CC_FLAGS   = -O0 -I${BSA_PATH}/ -I${BSA_PATH}/val/ -I${BSA_PATH}/val/sbsa -I${BSA_PATH}/val/common
+  GCC:*_*_*_CC_FLAGS   = -O0 -I${BSA_PATH}/ -I${BSA_PATH}/val/ -I${BSA_PATH}/val/sbsa -I${BSA_PATH}/val/common
diff --git a/uefi_app/SbsaAvsNist.inf b/uefi_app/SbsaAvsNist.inf
@@ -103,6 +103,7 @@
   ../test_pool/pcie/operating_system/test_p037.c
   ../test_pool/pcie/operating_system/test_p038.c
   ../test_pool/pcie/operating_system/test_p039.c
+  ../test_pool/pcie/operating_system/test_p040.c
   ../test_pool/pcie/operating_system/test_p041.c
   ../test_pool/pcie/operating_system/test_p042.c
   ../test_pool/pcie/operating_system/test_p043.c