This repository provides an index of LinkedIn VLSI content creators and their materials
- Amit Bar - Analog Circuit Design Engineer || YouTube - Amit Bar
- Anurag Bhargava - Customer Success Manager | YouTuber | RF Design Enthusiast
- Chembiyan T - Senior Staff RF/Analog Engineer
- Guillermo Martínez - Hardware technical leader at Zennio
- Hesham Omran - Associate Professor and CTO
- Himanshu Agarwal - PrepFusion || AIR 27(EC), AIR 45(IN) GATE'22 || YouTube @HimanshuAgarwal_ & @PrepFusion_GATE
- Javed G S, PhD - Analog Design Manager @ Intel Advanced Design
- Muhammad Isa Aldacher - Analog / Mixed-Signal Design Engineer at Intel
- Master Micro - Master Micro provides EDA solutions and professional training and consulting services in the field of microelectronics.
- N. Raja Sekhar - Analog Design Manager
- Shubham Jaiswal - IISc Bangalore || M.Tech’25 || Analog/RF IC design Analog circuit design
- Tejas Ketkar - Circuit Designer | IEEE EDS UG Fellow | YouTube @ TejasKetkar
- Balajee Seshadri - Freely Sharing Embedded Systems Programming Course
- Joseph Ogbonna - Hardware Design Engineer | IoT Solutions Specialist | Transforming Ideas into Innovative Electronics & PCB Solutions
- Piyush Itankar - Embedded Systems @Google | inpyjama.com
- Rosmianto Aji Saputro - I help Arduino hobbyists transform into Pro Embedded Engineers | hobby2pro.rosmianto.com
- Hyeongwon (HW.Seo) Seo - 3D V-RAM and V-CMOS unit concept, patent, and structure development. *Freelancer
- Ahmed-Saghafi - Founder & CEO of FPGA Technology Training (FPGATEK) | Founder of FaradAndish | FPGA Expert | Online Course Creator
- Adam Taylor - Founder of FPGA Consultancy - Adiuvo Engineering. Embedded Systems Consultant, FPGA Expert, Prolific FPGA Writer
- Hemanth Chintalapudi - Educator & Writer | Technical Sketch Artist | ASIC RTL Design Engineer
- Gregory Stitt - Senior FPGA Engineer at Quantlab
- Jonas Julian Jensen - Hardware and software engineer | VHDL blogger | Instructor at VHDLwhiz.com
- Koray Karakurt - FPGA Expert
- Kumar Khandagle - Trainer @ Namaste FPGA
- Luca Benini - Full Professor at the University of Bologna and Chair of Digital Circuits and Systems at ETH Zurich
- Lukas Vik - FPGA Expert
- Michael Korobkov - Leader of the FPGA / RTL / Verification developers community @fpgasystems
- Mitu Raj - RTL Design Engineer & Embedded SW Developer ⇋ Founder & Content Creator at Chipmunk Logic™
- Muhammed Kocaoglu - Digital Design Engineer
- Murali kumar M - FPGA Expert
- Onur Mutlu - Professor at ETH Zürich, Visiting Professor at Stanford University, Adjunct Professor at Carnegie Mellon University
- Rahul Behl - Tenstorrent | Teaching proven hands-on RTL Design & Verification courses to succeed as a Hardware Engineer
- Russell Merrick - FPGA Influencer
- Yunus Esergün - FPGA Design Engineer at ASELSAN
- Ahmed Alsawi - Design Verification Engineer
- Anand Shirahatti - Scaling DV Teams
- Augustin JK - Design Verification Engineer
- Dave Rich - Verification Methodologist at Siemens EDA
- Deva Kumar Talluri - DV engineer & EX professor of electronics and communication engineering (15+ years of technical experience)
- Jairaj Mirashi - Design Verification Engineer
- Jatin Koshiya - Design Verification Engineer 2 @ Microsoft | Ex Nvidia, Intel & TCS | 11k+ Followers | Mentor
- Harshit G. - Design Verification Engineer @ Intel || Helped 500+ jobseekers in VLSI || Mock interview
- Peter Monsson - Verification Tips | UVMkit.com | Verification Engineer
- Peng Yu - Sr. Formal Verification Specialist | 14 yoe at Cadence | Making Professional Formal Verification Training Accessible To Individuals
- Prasanthi Chanda - Co-Founder & Managing Director at Semi Design
- Pravallika Tammisetty - Senior Verification Engineer
- Robin Garg - Principal Engineer, DV Architect at Intel || ex - Nuvia/Qualcomm/Arm
- Seelam Narendra Reddy - Design Verification Engineer
- Sweety P. - Formal Verification Engineer | Certified Keynote Speaker | Married to Semiconductors
- Shraddha Pawankar - Design and Verification Engineer
- Sougata Bhattacharjee - LinkedIn Top Voice Samsung (SSIR) | Ex - Intel | ASIC Verification | Proficient in SV, UVM, OVM, SVA, Verilog
- Ahmed-Abdelazeem - ASIC Physical Design Engineer
- Isha Sood - Structural Design Engineer at Intel | Ex-Lead Product Engineer at Cadence | Static Timing Analyst at Altran || IITK || Business Consultant
- Kunal Ghosh - Co-Founder at VLSI System Design, nurturing students in semiconductors
- Pooja Kumawat - 10k+ @Linkedin | ASIC Engineer @ NVIDIA | Intel Corporation | NXP Semiconductors | IIT BHU
- Prince Gupta - Senior Staff Engineer - Physical Design | Ex-Intel
- Puneet Mittal - Founder, Mentor, and Passionate Trainer at VLSI EXPERT Pvt. Ltd.
- Ramesh Kumar - Physical Design || EMIR || PV || M.tech in VLSI || NIT SURAT
- Rashid Iqbal - 23 years in Chip Design | 19 years at Intel | Physical Design
- Venu Kumar Kare - Physical Design Trainee at Chip Edge Technologies Pvt. Ltd.
- Ashwani Maurya - MBIST - EDT - OCC - SCAN - ATPG - SIM - DBUG
- Fabrizio Barragan - Electronic Designer IPC-CID/ IPC-A-610 CIT / Hardware PCB Layout
- Lukas Henkel - Open Visions Technology - providing engineering services and highly repairable fully open-hardware consumer electronics
- Petr Dvořák - Hardware Designer
- Raghavendra Anjanappa - Ex-Manager PDE Micron Hyderabad
- Sobhan Aram - Hardware System Designer | Electronic Design Engineer | Repairs of Electronic Systems | Microcontrollers | Control Systems
- Sobhan Jahaniparast - Embedded Hardware | PCB Engineer | Consultant
- Waseem Alkhayer - Hardware Product Development
- Wei Zhang - PCB Design
- Zachariah Peterson - Owner, NWES | PCB Design for RF, Mil-Aero, Data Center, AI/ML | That guy in the Altium videos
- Garal Das - EX Student OF HIT : AN ORDINARY TECH ENTHUSIAST.
- Kumar Priyadarshi - Building TechoVedas | Global Foundries | NUS | IITB | IISER
- Learn VLSI
- Priya Pandey - Senior Engineer 1-Design@Microchip Technology ▪️ AI/ML/Data-Science Enthusiast
- Raju Prasad - VLSI Recruiter | Employer Branding | Chip Blogger
- Sanchit Kulkarni - AMD | Bits Pilani | Honeywell Aerospace | Talks about #vlsi #semiconductors
- Dr.Swamynathan S M - Associate Professor-Dept.of ECE-Karpagam College of Engineering
- Shilpi Gupta - 15k+ @LinkedIn | System Hardware Engineer @ Microsoft
- Simon Southwell - Semi-retired logic, software and systems designer. Technical writer, mentor, educator and presenter.
- Sri Harsha - ASIC Design and Verification Trainee @ VLSI FIRST
- vlsideepdive