feat(PeriphDrivers)!: Add SPI v2 Implementation to MAX78002 (#632)

* QSPI initial checkpoint: - Working standard reads/writes - Working QSPI reads/writes * Checkpoint: QSPI+DMA working * Clear rx buffer between tests * Add DMA read (not working - timing issues w/ DMA overhead) * Checkpoint: register-level DMA write * Checkpoint: Working 4-wire reads/writes * Checkpoint: Fix local dummy value bug - If the value of the dummy byte was defined locally inside of the spi_transmit function, it would introduce some glitches on the SPI MOSI line. Suspected compiler optimization issue. For some reason, these glitches also corrupted the MISO line. This caused RX data to be corrupted, and ram reads would return incorrect values. * Add benchmark for DMA overhead (checkpoint: 24us) * Checkpoint: Working QSPI writes, semi-working QSPI reads (first 3 bytes are corrupted by misaligned IO1) * Checkpoint: Debugging QSPI fast read timing * Checkpoint: Working QSPI DMA reads with IPO at 24Mhz SPI, VGA write in 86us, VGA read in 65us (!!!) * Break out drivers into their own files * Add boundary cross test * Move ram reset/exit qspi to sram init * Add TODOs * Move ram reset/exit qspi to sram init * Add TODOs * Added SPI Async/Interrupt changes. * [NOT WORKING] SPI RevB: Initial commit of WIP for spi_revb to save current work in case of deletion. * SPI RevB: Organized functions. * SPI RevB: Chip Select Changes. * SPI RevB: Latest notes and changes based on review. * Pushing latest SPI changes for Jake. * Implement SPI functions with RevB version. * Renamed CS_CFG to TARGET. * Removed commented code and added target name changes. * Add comments to spi_fast functions. * Fix build errors and add target select config functions. * Lastest build state for SPI fast. * Replaced RevA/RevB naming to RevA1/RevA2 respectively * Replace spi_fast.h to spi.h * Pushing latest changes * Add spi_reva2 and _reva1 selection * Added back spi_fast_ai87.c * Correct SPI pin constants * Working state for Transaction and TransactionAsync except for 9 or 10bit wide messages * Correct DMA reinitialization * 1 byte transactions now work * Added helper functions to for DMA usage * Async/Sync Controller Transactions now work * Clean up spi_reva2 * Fix comment guards * Clean up spi_reva2 * Fix parameter names, got DMA SPI TX working * SPI RX and TX DMA now work * Rename new chip-specific SPI drivers * feat(PeriphDrivers): Add previously supported functions * feat(PeriphDrivers): Add previous implementation for backwards compatibility * revert(PeriphDrivers): Revert previously supported SPI files * fix(Examples): Pull latest QSPI example changes * feat(PeriphDrivers): Add option to build new SPI drivers * feat(PeriphDrivers): Replace RevA to RevA1 * feat(PeriphDrivers): Replace RevA to RevA1 * feat(PeriphDrivers): Add new DMA DeInit function to all parts * feat(PeriphDrivers): Replace spi_reva.h include with spi_reva1.h * clang-format bot reformatting. * style(PeriphDrivers): Fix linter errors * feat(PeriphDrivers): Check changes for spi_reva1.h * fix(PeriphDrivers): Redirect old SPI functions using new implementation * clang-format bot reformatting. * feat(PeriphDrivers): Add new SPI v2 pin definitions * style(PeriphDrivers): Fix linter errors * clang-format bot reformatting. * feat(Examples): Support new SPI v2 implementation with SPI example * style(Examples): Fix linter errors * build(PeriphDrivers): Replace spi_reva.c to spi_reva1.c * fix(PeriphDrivers): Fix pins definition for MAX32520 * revert(PeriphDrivers): Revert clang-format on certain sections in spi.h * fix(PeriphDrivers): Fix build error with MAX78002 new SPI implementation * revert(Examples): Revert QSPI * fix(Examples): Fix define for MXC_SPI_V2 in MAX78002 * fix(Examples): Add DMA Helper function in MAX78002 SPI * fix(PeriphDrivers): Remove floating braces * fix(Examples): Fix typos * fix(Examples): Remove floating braces and incomplete functions * fix(PeriphDrivers): Remove undefined SPI function * fix(PeriphDrivers): Remove new in drivers * fix(PeriphDrivers): Remove commented code * fix(PeriphDrivers): Set RX and TX Thresholds after flushing FIFOs * fix(Examples): Revert SPI example settings * feat(PeriphDrivers): Remove MXC_SPI_V2 for default and use MXC_SPI_LEGACY instead * Revert "fix(Examples): Pull latest QSPI example changes" This reverts commit 22459b4. * revert(Examples): Revert QSPI * feat(PeriphDrivers): Remove unnecessary code * clang-format bot reformatting. * feat(PeriphDrivers): Add new init struct functions * fix(PeriphDrivers): Remove target pointer * clang-format bot reformatting. * feat(Examples): Update example using SPI v2 * clang-format bot reformatting. * feat(Examples): Address different TX/RX DMA CH Interrupts * feat(Examples): Fix wording on SPI example for MAX78002 * feat(Examples,PeriphDrivers): Add porting guide to SPI README for MAX78002 * fix(PeriphDrivers): Fix build errors * fix(Examples,PeriphDrivers): Fix SPI DMA not working * feat(Examples,PeriphDrivers): Set interface mode in SPI * feat(Examples): Update SPI example to use SPI v2 * docs(Examples): Add porting guide to SPI example for MAX78002 * docs(Examples): Add porting guide to SPI example for MAX78002 * feat(PeriphDrivers): Move InitStruct functions to chip-specific library level * fix(Examples,PeriphDrivers): Address review suggesstions * clang-format bot reformatting. * feat(Examples): Add custom target feature example to SPI * feat(Examples): Fix SPI documentation * revert(PeriphDrivers): Revert accidental spi.h commits and update SPI doxygen * fix(PeriphDrivers): Fix comments * clang-format bot reformatting. * feat(Examples): Update READMEs for SPI and build previous SPI library for SPI_MasterSlave example * fix(Examples): Fix SPI library build selection * fix(Examples): Fix SPI library build selection p2 * feat(PeriphDrivers): Add overflow check for SPI TX/RX message lenngths * feat(PeriphDrivers): Set controller_done flag when TX or RX DMA transactions are finished * clang-format bot reformatting. * fix(PeriphDrivers): Remove target functions * fix(Examples): Remove deleted field from SPI README --------- Co-authored-by: Jake Carter <jake.carter@analog.com> Co-authored-by: sihyung-maxim <sihyung-maxim@users.noreply.github.com>
analogdevicesinc · Jun 26, 2023 · 3dfff94 · 3dfff94
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diff --git a/Examples/MAX78002/QSPI/.vscode/README.md b/Examples/MAX78002/QSPI/.vscode/README.md
diff --git a/Examples/MAX78002/QSPI/.vscode/settings.json b/Examples/MAX78002/QSPI/.vscode/settings.json
diff --git a/Examples/MAX78002/SPI/README.md b/Examples/MAX78002/SPI/README.md
@@ -7,8 +7,84 @@ Multiple word sizes (2 through 16 bits) are demonstrated.
 
 By default, the example performs blocking SPI transactions.  To switch to non-blocking (asynchronous) transactions, reset the MASTERSYNC macro to 0 and set the MASTERASYNC macro to 1.  To use DMA transactions, set the MASTERDMA macro to 1 instead.
 
+This example also demonstrates the feature to use custom Target Selects that the SPI v2 Driver will automatically assert/deassert during transactions. Set the CUSTOM_TARGET macro to 1 to use the custom target. To use the default TS pins, set the CUSTOM_TARGET macro to 0 instead.
+
 ## Software
 
+This example uses the SPI v2 Library. To use the previous SPI library, set `MXC_SPI_BUILD_LEGACY=1` in the Project's project.mk file.
+
+### Porting Guide
+
+The SPI v2 Library is backwards compatible with the previous SPI API - meaning the previously existing function prototypes have not changed. There are functional differences with SPI DMA interrupt handling that must be updated when porting a project from using the previous SPI API to SPI v2.
+
+#### SPI v2 API Differences
+
+##### SPI Init Function
+
+The `MXC_SPI_Init(...)` function is still supported with SPI v2, but there is some added overhead due to the limited settings that this function can set.
+
+Use the `MXC_SPI_Init_v2(...)` function for 1) to decrease overhead and 2) to give the caller more control in the SPI setup.
+
+**`mxc_spi_init_t init` Fields**
+- `mxc_spi_regs_t *spi`              //<== SPI Instance
+- `mxc_gpio_cfg_t *spi_pins`         //<== (Optional) Caller supplied SPI pins.
+- `mxc_spi_type_t type`              //<== Controller (L. Master) or Target (L. Slave) Modes
+- `uint32_t freq`                    //<== SPI Frequency
+- `mxc_spi_clkmode_t clk_mode`       //<== Clock Mode (CPOL:CPHA)
+- `mxc_spi_interface_t mode`         //<== Select Interface (Standard 4-wire, 3-wire, dual, quad)
+- `mxc_spi_tscontrol_t ts_control`   //<== HW Auto, SW Driver, or SW Application Target Control
+- `mxc_spi_target_t target`          //<== Target settings (custom TS pins, init mask, active polarity) 
+- `mxc_gpio_vssel_t vssel`           //<== Select Pin Voltage Level (VDDIO/VDDIOH)
+- `bool use_dma`                     //<== TRUE/FALSE setting.
+- `mxc_dma_regs_t *dma`              //<== DMA Instance
+
+##### SPI DMA Interrupt Handling
+
+```c
+void DMA_TX_IRQHandler(void)
+{
+    MXC_SPI_DMA_TX_Handler(SPI);
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_SPI_DMA_RX_Handler(SPI);
+}
+
+```
+The previous SPI API uses the MXC_DMA_Handler, but SPI v2 supplies its own Handler processing functions to call for TX and RX DMA.
+
+##### SPI DMA Setup
+```c
+    ...
+    TX_DMA_CH = MXC_SPI_DMA_GetTXChannel(SPI);
+    RX_DMA_CH = MXC_SPI_DMA_GetRXChannel(SPI);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(TX_DMA_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(RX_DMA_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(TX_DMA_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(RX_DMA_CH), DMA_RX_IRQHandler);
+
+    MXC_SPI_MasterTransactionDMA(&req);
+    ...
+```
+Following the DMA channel interrupt changes from the previous section, it is recommended to set up a generic name DMA TX/RX vector because the the TX and RX DMA channels won't always acquire DMA_CH0 and DMA_CH1, respectively.
+
+##### Blocking SPI Transaction (MXC_SPI_MasterTransaction(...))
+```c
+void SPI_IRQHandler(void)
+{
+    MXC_SPI_Handler(SPI); // Or MXC_SPI_AsyncHandler(SPI); Same function, different names.
+}   
+
+    ...
+    NVIC_EnableIRQ(SPI);
+    MXC_SPI_MasterTransaction(&req);
+    ...
+```
+The blocking SPI transaction function is now interrupt driven for SPI v2 - meaning the SPI instances' IRQ must be enabled and the MXC_SPI_Handler(...) or MXC_SPI_AsyncHandler(...) function must be called in the interrupt routine.
+
 ### Project Usage
 
 Universal instructions on building, flashing, and debugging this project can be found in the **[MSDK User Guide](https://analog-devices-msdk.github.io/msdk/USERGUIDE/)**.

diff --git a/Examples/MAX78002/SPI/main.c b/Examples/MAX78002/SPI/main.c
@@ -56,6 +56,8 @@
 #define MASTERASYNC 0
 #define MASTERDMA 0
 
+#define CUSTOM_TARGET 0
+
 #if (!(MASTERSYNC || MASTERASYNC || MASTERDMA))
 #error "You must set either MASTERSYNC or MASTERASYNC or MASTERDMA to 1."
 #endif
@@ -65,7 +67,7 @@
 
 /***** Definitions *****/
 #define DATA_LEN 100 // Words
-#define DATA_VALUE 0xA5A5 // This is for master mode only...
+#define DATA_VALUE 0xA5B7 // This is for master mode only...
 #define VALUE 0xFFFF
 #define SPI_SPEED 100000 // Bit Rate
 
@@ -75,7 +77,7 @@
 uint16_t rx_data[DATA_LEN];
 uint16_t tx_data[DATA_LEN];
 volatile int SPI_FLAG;
-volatile uint8_t DMA_FLAG = 0;
+int TX_DMA_CH, RX_DMA_CH;
 
 /***** Functions *****/
 #if (SPI_INSTANCE_NUM == 0)
@@ -94,15 +96,14 @@ void SPI1_IRQHandler(void)
 }
 #endif
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
-    MXC_DMA_Handler();
+    MXC_SPI_DMA_TX_Handler(SPI);
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
-    MXC_DMA_Handler();
-    DMA_FLAG = 1;
+    MXC_SPI_DMA_RX_Handler(SPI);
 }
 
 void SPI_Callback(mxc_spi_req_t *req, int error)
@@ -115,22 +116,13 @@ int main(void)
     int i, j, retVal;
     uint16_t temp;
     mxc_spi_req_t req;
-    mxc_spi_pins_t spi_pins;
+    mxc_spi_init_t init;
 
     printf("\n**************************** SPI MASTER TEST *************************\n");
     printf("This example configures the SPI to send data between the MISO (P0.22) and\n");
     printf("MOSI (P0.21) pins.  Connect these two pins together.  \n\n");
     printf("Multiple word sizes (2 through 16 bits) are demonstrated.\n\n");
 
-    spi_pins.clock = TRUE;
-    spi_pins.miso = TRUE;
-    spi_pins.mosi = TRUE;
-    spi_pins.sdio2 = FALSE;
-    spi_pins.sdio3 = FALSE;
-    spi_pins.ss0 = TRUE;
-    spi_pins.ss1 = FALSE;
-    spi_pins.ss2 = FALSE;
-
 #if MASTERSYNC
     printf("Performing blocking (synchronous) transactions...\n");
 #endif
@@ -143,48 +135,74 @@ int main(void)
 
     for (i = 2; i < 17; i++) {
         // Sending out 2 to 16 bits
-
         for (j = 0; j < DATA_LEN; j++) {
             tx_data[j] = DATA_VALUE;
         }
 
-        // Configure the peripheral
-        retVal = MXC_SPI_Init(SPI, 1, 0, 1, 0, SPI_SPEED, spi_pins);
+        // Initialization Settings.
+        init.spi = SPI;
+        init.freq = SPI_SPEED;
+        init.spi_pins = NULL; // Use default, predefined pins
+        init.mode = MXC_SPI_INTERFACE_STANDARD; // 4-wire
+        init.type = MXC_SPI_TYPE_CONTROLLER;
+        init.clk_mode = MXC_SPI_CLKMODE_0; // CPOL: 0, CPHA: 0
+        init.frame_size = i;
+
+        // Target Select Settings
+#if CUSTOM_TARGET
+        // Example to select a custom target.
+        mxc_gpio_cfg_t target_pins;
+        target_pins.port = MXC_GPIO0;
+        target_pins.mask = MXC_GPIO_PIN_9;
+        target_pins.func = MXC_GPIO_FUNC_OUT;
+        target_pins.pad = MXC_GPIO_PAD_PULL_UP;
+        target_pins.vssel = MXC_GPIO_VSSEL_VDDIOH; // Set custom target pin to VDDIOH (3.3V).
+
+        init.ts_control =
+            MXC_SPI_TSCONTROL_SW_DRV; // SPI Driver will handle deassertion for TS pins.
+        init.target.pins = target_pins;
+        init.target.active_polarity = 0;
+        init.vssel = MXC_GPIO_VSSEL_VDDIOH; // Set SPI pins to VDDIOH (3.3V).
+#else
+        init.ts_control = MXC_SPI_TSCONTROL_HW_AUTO; // HW will deassert/assert TS pins.
+        init.target.active_polarity = 0;
+        init.target.init_mask = 0x01; // Initialize Target Select 0 pin.
+        init.vssel = MXC_GPIO_VSSEL_VDDIO;
+#endif
+
+        // DMA Settings.
+#if MASTERDMA
+        init.use_dma = true;
+        init.dma = MXC_DMA;
+#else
+        init.use_dma = false;
+#endif
+
+        retVal = MXC_SPI_Init_v2(&init);
         if (retVal != E_NO_ERROR) {
             printf("\nSPI INITIALIZATION ERROR\n");
             return retVal;
         }
 
         memset(rx_data, 0x0, DATA_LEN * sizeof(uint16_t));
 
-        //SPI Request
+        // SPI Request
         req.spi = SPI;
-        req.txData = (uint8_t *)tx_data;
-        req.rxData = (uint8_t *)rx_data;
-        req.txLen = DATA_LEN;
-        req.rxLen = DATA_LEN;
-        req.ssIdx = 0;
-        req.ssDeassert = 1;
-        req.txCnt = 0;
-        req.rxCnt = 0;
-        req.completeCB = (spi_complete_cb_t)SPI_Callback;
+        req.tx_buffer = (uint8_t *)tx_data;
+        req.rx_buffer = (uint8_t *)rx_data;
+        req.tx_len = DATA_LEN;
+        req.rx_len = DATA_LEN;
+        req.ts_idx = 0;
+        req.deassert = 1;
+        req.tx_cnt = 0;
+        req.rx_cnt = 0;
+        req.callback = (mxc_spi_callback_t)SPI_Callback;
+        req.target_sel = init.target;
         SPI_FLAG = 1;
 
-        retVal = MXC_SPI_SetDataSize(SPI, i);
-
-        if (retVal != E_NO_ERROR) {
-            printf("\nSPI SET DATASIZE ERROR: %d\n", retVal);
-            return retVal;
-        }
-
-        retVal = MXC_SPI_SetWidth(SPI, SPI_WIDTH_STANDARD);
-
-        if (retVal != E_NO_ERROR) {
-            printf("\nSPI SET WIDTH ERROR: %d\n", retVal);
-            return retVal;
-        }
-
 #if MASTERSYNC
+        // Blocking SPI v2 Implementation is Interrupt driven.
+        NVIC_EnableIRQ(SPI_IRQ);
         MXC_SPI_MasterTransaction(&req);
 #endif
 
@@ -193,23 +211,24 @@ int main(void)
         MXC_SPI_MasterTransactionAsync(&req);
 
         while (SPI_FLAG == 1) {}
-
 #endif
 
 #if MASTERDMA
-        MXC_DMA_ReleaseChannel(0);
-        MXC_DMA_ReleaseChannel(1);
+        TX_DMA_CH = MXC_SPI_DMA_GetTXChannel(SPI);
+        RX_DMA_CH = MXC_SPI_DMA_GetRXChannel(SPI);
 
-        NVIC_EnableIRQ(DMA0_IRQn);
-        NVIC_EnableIRQ(DMA1_IRQn);
-        MXC_SPI_MasterTransactionDMA(&req);
+        NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(TX_DMA_CH));
+        NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(RX_DMA_CH));
 
-        while (DMA_FLAG == 0) {}
+        MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(TX_DMA_CH), DMA_TX_IRQHandler);
+        MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(RX_DMA_CH), DMA_RX_IRQHandler);
 
-        DMA_FLAG = 0;
+        MXC_SPI_MasterTransactionDMA(&req);
+
+        while (SPI_FLAG == 1) {}
 #endif
 
-        uint8_t bits = MXC_SPI_GetDataSize(SPI);
+        uint8_t bits = MXC_SPI_GetFrameSize(SPI);
 
         for (j = 0; j < DATA_LEN; j++) {
             if (bits <= 8) {

diff --git a/Examples/MAX78002/SPI/project.mk b/Examples/MAX78002/SPI/project.mk
@@ -13,5 +13,3 @@
 
 # Add your config here!
 
-
-
diff --git a/Examples/MAX78002/SPI_MasterSlave/README.md b/Examples/MAX78002/SPI_MasterSlave/README.md
@@ -8,6 +8,10 @@ Once the master ends the transaction, the data received by the master and the sl
 
 ## Software
 
+### SPI v2 Library
+
+The SPI v2 Library does not support Target (L. Slave) Transaction functions yet. To use the previous SPI driver, set `MXC_SPI_BUILD_LEGACY=1` in the Project's project.mk file.
+
 ### Project Usage
 
 Universal instructions on building, flashing, and debugging this project can be found in the **[MSDK User Guide](https://analog-devices-msdk.github.io/msdk/USERGUIDE/)**.

diff --git a/Examples/MAX78002/SPI_MasterSlave/project.mk b/Examples/MAX78002/SPI_MasterSlave/project.mk
@@ -9,3 +9,6 @@
 
 # Add your config here!
 
+# SPI v2 does not support Target (L. Slave) Transaction functions yet.
+# Set the MXC_SPI_BUILD_LEGACY to 1 to build the previous SPI library.
+MXC_SPI_BUILD_LEGACY=1
diff --git a/Libraries/Boards/MAX78002/EvKit_V1/board.mk b/Libraries/Boards/MAX78002/EvKit_V1/board.mk
@@ -100,6 +100,11 @@ PROJ_CFLAGS+=-DCAMERA_OV7692
 endif
 SRCS += sccb.c
 
+ifeq "$(MXC_SPI_BUILD_LEGACY)" "1"
+MXC_SPI_LEGACY=1
+PROJ_CFLAGS+=-DMXC_SPI_LEGACY
+endif
+
 MISC_DRIVERS_DIR ?= $(MAXIM_PATH)/Libraries/MiscDrivers
 
 # Where to find BSP source files

diff --git a/Libraries/CMSIS/Device/Maxim/MAX78002/Include/max78002.h b/Libraries/CMSIS/Device/Maxim/MAX78002/Include/max78002.h
@@ -34,6 +34,7 @@
 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_MAX78002_H_
 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_MAX78002_H_
 
+// clang-format off
 #ifndef TARGET_NUM
 #define TARGET_NUM 78002
 #endif
@@ -501,6 +502,9 @@ typedef enum {
 
 #define MXC_DMA_GET_IDX(p) ((p) == MXC_DMA ? 0 : -1)
 
+#define MXC_DMA_CH_GET_IRQ(i) ((IRQn_Type)(((i) == 0) ? DMA0_IRQn : ((i) == 1) ? DMA1_IRQn : \
+                                ((i) == 2) ? DMA2_IRQn : ((i) == 3) ? DMA3_IRQn : 0))
+
 /******************************************************************************/
 /*                                                                        FLC */
 #define MXC_FLC_INSTANCES (1)
@@ -622,9 +626,11 @@ typedef enum {
 
 #define MXC_BASE_SPI1 ((uint32_t)0x40046000UL)
 #define MXC_SPI1 ((mxc_spi_regs_t *)MXC_BASE_SPI1)
+#define MXC_SPI1_TS_INSTANCES (1)
 #ifndef __riscv
 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL)
 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)
+#define MXC_SPI0_TS_INSTANCES (3)
 
 // Note: These must be in order SPI1, SPI0 to support RISC-V
 #define MXC_SPI_GET_IDX(p) ((p) == MXC_SPI1 ? 0 : (p) == MXC_SPI0 ? 1 : -1)
@@ -634,6 +640,9 @@ typedef enum {
 #define MXC_SPI_GET_SPI(i) ((i) == 0 ? MXC_SPI1 : (i) == 1 ? MXC_SPI0 : 0)
 
 #define MXC_SPI_GET_IRQ(i) (IRQn_Type)((i) == 0 ? SPI1_IRQn : (i) == 1 ? SPI0_IRQn : 0)
+
+#define MXC_SPI_GET_TOTAL_TS(p) \
+    ((p) == MXC_SPI1 ? MXC_SPI1_TS_INSTANCES : (p) == MXC_SPI0 ? MXC_SPI0_TS_INSTANCES : 0)
 #else // __riscv
 
 #define MXC_SPI_GET_IDX(p) ((p) == MXC_SPI1 ? 0 : -1)
@@ -644,6 +653,8 @@ typedef enum {
 
 #define MXC_SPI_GET_IRQ(i) (IRQn_Type)((i) == 0 ? SPI1_IRQn : 0)
 
+#define MXC_SPI_GET_TOTAL_TS(p) ((p) == MXC_SPI1 ? MXC_SPI1_TS_INSTANCES : 0)
+
 #endif // __riscv
 
 /******************************************************************************/
@@ -756,4 +767,6 @@ typedef enum {
 #define SCB_CPACR_CP11_Pos 22 /*!< SCB CPACR: Coprocessor 11 Position */
 #define SCB_CPACR_CP11_Msk (0x3UL << SCB_CPACR_CP11_Pos) /*!< SCB CPACR: Coprocessor 11 Mask */
 
+// clang-format on
+
 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_MAX78002_H_
diff --git a/Libraries/PeriphDrivers/Include/MAX32520/dma.h b/Libraries/PeriphDrivers/Include/MAX32520/dma.h
@@ -185,6 +185,11 @@ typedef mxc_dma_srcdst_t (*mxc_dma_trans_chain_t)(mxc_dma_srcdst_t dest);
  */
 int MXC_DMA_Init(void);
 
+/**
+ * @brief      De-Initialize DMA resources.
+ */
+void MXC_DMA_DeInit(void);
+
 /**
  * @brief      Request DMA channel
  * @details    Returns a handle to the first free DMA channel, which can be used via API calls