feat(riscv/aclint): make platform aclint support compile opt

Signed-off-by: Bruno Sa <bruno.vilaca.sa@gmail.com>

src/arch/riscv/arch.mk

@@ -18,6 +18,7 @@ irqc_arch_dir=$(cpu_arch_dir)/irqc/$(IRQC_DIR)
 src_dirs+=$(irqc_arch_dir)
 
 arch-cppflags+=-DIRQC=$(IRQC)
+arch-cppflags+=-DIPIC=$(IPIC)
 ifeq ($(ACLINT_PRESENT), 1)
 arch-cppflags+=-DACLINT_PRESENT
 endif

src/arch/riscv/inc/arch/interrupts.h

@@ -12,6 +12,9 @@
 #define PLIC  (1)
 #define APLIC (2)
 
+#define IPIC_SBI (1)
+#define IPIC_ACLINT (2)
+
 /**
  * In riscv, the ipi (software interrupt) and timer interrupts dont actually
  * have an ID as their are treated differently from external interrupts

src/arch/riscv/objects.mk

@@ -15,4 +15,6 @@ cpu-objs-y+=cpu.o
 cpu-objs-y+=cache.o
 cpu-objs-y+=iommu.o
 cpu-objs-y+=relocate.o
-cpu-objs-y+=aclint.o
+ifeq ($(IPIC),IPIC_ACLINT)
+cpu-objs-y+=aclint.o
+endif

src/platform/qemu-riscv64-virt/platform.mk

@@ -7,6 +7,8 @@ ARCH:=riscv
 CPU:=
 # Interrupt controller definition
 IRQC:=PLIC
+# Core IPIs controller
+IPIC:=IPIC_ACLINT
 
 drivers := sbi_uart
 

src/platform/qemu-riscv64-virt/virt_desc.c

@@ -26,8 +26,14 @@ struct platform platform = {
         #else 
         #error "unknown IRQC type " IRQC
         #endif
-        // Disable ACLINT by default
-        .aclint_sswi.base = 0
+
+        #if (IPIC == IPIC_SBI)
+        .aclint_sswi.base = 0,
+        #elif (IPIC == IPIC_ACLINT)
+        .aclint_sswi.base = 0x2f00000,
+        #else 
+        #error "unknown IPIC type " IPIC
+        #endif
     }
 
 };