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@bespoke-silicon-group

Bespoke Silicon Group

Accelerating productive, PPA-optimal HW Design

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  1. basejump_stl basejump_stl Public

    BaseJump STL: A Standard Template Library for SystemVerilog

    SystemVerilog 521 99

  2. bsg_manycore bsg_manycore Public

    Tile based architecture designed for computing efficiency, scalability and generality

    SystemVerilog 229 58

  3. bsg_sv2v bsg_sv2v Public

    A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.

    Python 39 10

  4. bsg_packaging bsg_packaging Public

    BaseJump Open-Source Hardware Accelerator Packages and Sockets

    Tcl 8 2

  5. bsg_motherboards bsg_motherboards Public

    BaseJump Open-Source Hardware Accelerator Motherboards

    Verilog 7

  6. bsg_bladerunner bsg_bladerunner Public

    Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)

    Python 36 19

Repositories

Showing 10 of 34 repositories
  • bsg_replicant Public

    BSG Replicant: Cosimulation and Emulation Infrastructure for HammerBlade

    bespoke-silicon-group/bsg_replicant’s past year of commit activity
    C++ 26 BSD-3-Clause 20 36 32 Updated Nov 10, 2024
  • basejump_stl Public

    BaseJump STL: A Standard Template Library for SystemVerilog

    bespoke-silicon-group/basejump_stl’s past year of commit activity
    SystemVerilog 521 99 99 65 Updated Nov 6, 2024
  • bsg-motif-gpu-benchmarks-src Public
    bespoke-silicon-group/bsg-motif-gpu-benchmarks-src’s past year of commit activity
    HTML 0 BSD-3-Clause 0 0 0 Updated Nov 2, 2024
  • bsg_manycore Public

    Tile based architecture designed for computing efficiency, scalability and generality

    bespoke-silicon-group/bsg_manycore’s past year of commit activity
    SystemVerilog 229 58 64 26 Updated Nov 2, 2024
  • bsg_pearls Public

    Open source IP blocks for SoCs and testing collateral. Often consists of compound instantiations of BaseJump STL or other blocks.

    bespoke-silicon-group/bsg_pearls’s past year of commit activity
    SystemVerilog 2 BSD-3-Clause 1 0 2 Updated Nov 2, 2024
  • hb_hammerbench Public

    HammerBlade Benchmarks

    bespoke-silicon-group/hb_hammerbench’s past year of commit activity
    C++ 0 BSD-3-Clause 0 0 4 Updated Oct 30, 2024
  • bsg_bladerunner Public

    Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)

    bespoke-silicon-group/bsg_bladerunner’s past year of commit activity
    Python 36 BSD-3-Clause 19 5 4 Updated Oct 1, 2024
  • llvm-project Public Forked from llvm/llvm-project

    The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

    bespoke-silicon-group/llvm-project’s past year of commit activity
    C++ 0 12,151 1 4 Updated Sep 12, 2024
  • bsg_newlib_dramfs Public

    newlib, but with a dram-based file system using LittleFS! Also known as Panic Room.

    bespoke-silicon-group/bsg_newlib_dramfs’s past year of commit activity
    C 8 GPL-2.0 1 1 1 Updated Mar 4, 2024
  • bsg_packaging Public

    BaseJump Open-Source Hardware Accelerator Packages and Sockets

    bespoke-silicon-group/bsg_packaging’s past year of commit activity
    Tcl 8 2 7 0 Updated Mar 4, 2024
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