misc: consolidate alignment macros into single header out of adiv5

src/include/align.h

@@ -0,0 +1,48 @@
+/*
+ * This file is part of the Black Magic Debug project.
+ *
+ * Copyright (C) 2023 1BitSquared <info@1bitsquared.com>
+ * Written by Rafael Silva <perigoso@riseup.net>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef INCLUDE_ALIGN_H
+#define INCLUDE_ALIGN_H
+
+typedef enum align {
+	ALIGN_BYTE = 0,     /* 8 bit alignment */
+	ALIGN_HALFWORD = 1, /* 16 bit alignment */
+	ALIGN_WORD = 2,     /* 32 bit alignment */
+	ALIGN_DWORD = 3     /* 64 bit alignment */
+} align_e;
+
+#define ALIGN_OF(x)     (((x)&3U) == 0 ? ALIGN_WORD : (((x)&1U) == 0 ? ALIGN_HALFWORD : ALIGN_BYTE))
+#define MIN_ALIGN(x, y) MIN(ALIGN_OF(x), ALIGN_OF(y))
+
+#define ALIGN(x, n) (((x) + (n)-1) & ~((n)-1))
+
+#endif /* INCLUDE_ALIGN_H */

src/include/general.h

@@ -45,6 +45,7 @@
 #include "maths_utils.h"
 #include "timing.h"
 #include "platform_support.h"
+#include "align.h"
 
 #ifndef ARRAY_LENGTH
 #define ARRAY_LENGTH(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -104,7 +105,6 @@ void debug_serial_send_stdout(const uint8_t *data, size_t len);
 #define DEBUG_WIRE(...)   debug_wire(__VA_ARGS__)
 #endif
 
-#define ALIGN(x, n) (((x) + (n)-1) & ~((n)-1))
 #undef MIN
 #define MIN(x, y) (((x) < (y)) ? (x) : (y))
 #undef MAX

src/platforms/hosted/cmsis_dap.c

@@ -486,13 +486,11 @@ bool dap_run_cmd(const void *const request_data, const size_t request_length, vo
 	return (size_t)result >= response_length;
 }
 
-#define ALIGNOF(x) (((x)&3) == 0 ? ALIGN_WORD : (((x)&1) == 0 ? ALIGN_HALFWORD : ALIGN_BYTE))
-
 static void dap_mem_read(adiv5_access_port_s *ap, void *dest, uint32_t src, size_t len)
 {
 	if (len == 0)
 		return;
-	align_e align = MIN(ALIGNOF(src), ALIGNOF(len));
+	const align_e align = MIN_ALIGN(src, len);
 	DEBUG_WIRE("dap_mem_read @ %" PRIx32 " len %zu, align %d\n", src, len, align);
 	/* If the read can be done in a single transaction, use the dap_read_single() fast-path */
 	if ((1U << align) == len) {

src/target/adiv5.c

@@ -989,8 +989,6 @@ void adiv5_dp_init(adiv5_debug_port_s *const dp)
 	adiv5_dp_unref(dp);
 }
 
-#define ALIGNOF(x) (((x)&3U) == 0 ? ALIGN_WORD : (((x)&1U) == 0 ? ALIGN_HALFWORD : ALIGN_BYTE))
-
 /* Program the CSW and TAR for sequential access at a given width */
 void ap_mem_access_setup(adiv5_access_port_s *ap, uint32_t addr, align_e align)
 {
@@ -1079,10 +1077,10 @@ const void *adiv5_pack_data(const uint32_t dest, const void *const src, uint32_t
 	return (const uint8_t *)src + (1 << align);
 }
 
-void advi5_mem_read_bytes(adiv5_access_port_s *ap, void *dest, uint32_t src, size_t len)
+void advi5_mem_read_bytes(adiv5_access_port_s *const ap, void *dest, uint32_t src, size_t len)
 {
 	uint32_t osrc = src;
-	const align_e align = MIN(ALIGNOF(src), ALIGNOF(len));
+	const align_e align = MIN_ALIGN(src, len);
 
 	if (len == 0)
 		return;
@@ -1144,8 +1142,8 @@ uint32_t firmware_ap_read(adiv5_access_port_s *ap, uint16_t addr)
 	return ret;
 }
 
-void adiv5_mem_write(adiv5_access_port_s *ap, uint32_t dest, const void *src, size_t len)
+void adiv5_mem_write(adiv5_access_port_s *const ap, const uint32_t dest, const void *const src, const size_t len)
 {
-	align_e align = MIN(ALIGNOF(dest), ALIGNOF(len));
+	const align_e align = MIN_ALIGN(dest, len);
 	adiv5_mem_write_sized(ap, dest, src, len, align);
 }

src/target/adiv5.h

@@ -219,13 +219,6 @@
 #define SWDP_ACK_FAULT       0x04U
 #define SWDP_ACK_NO_RESPONSE 0x07U
 
-typedef enum align {
-	ALIGN_BYTE = 0,
-	ALIGN_HALFWORD = 1,
-	ALIGN_WORD = 2,
-	ALIGN_DWORD = 3
-} align_e;
-
 typedef struct adiv5_access_port adiv5_access_port_s;
 typedef struct adiv5_debug_port adiv5_debug_port_s;
 

src/target/efm32.c

@@ -43,7 +43,7 @@
 #include "adiv5.h"
 
 #define SRAM_BASE        0x20000000U
-#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(efm32_flash_write_stub), 4)
+#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(efm32_flash_write_stub), 4U)
 
 static bool efm32_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
 static bool efm32_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);

src/target/lmi.c

@@ -31,7 +31,7 @@
 #include "cortexm.h"
 
 #define SRAM_BASE        0x20000000U
-#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(lmi_flash_write_stub), 4)
+#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(lmi_flash_write_stub), 4U)
 
 #define BLOCK_SIZE 0x400U
 

src/target/lpc_common.c

@@ -325,7 +325,7 @@ static bool lpc_flash_write(target_flash_s *tf, target_addr_t dest, const void *
 		DEBUG_ERROR("Prepare failed\n");
 		return false;
 	}
-	const uint32_t bufaddr = ALIGN(f->iap_ram + sizeof(iap_frame_s), 4);
+	const uint32_t bufaddr = ALIGN(f->iap_ram + sizeof(iap_frame_s), 4U);
 	target_mem_write(f->f.t, bufaddr, src, len);
 	/* Only LPC80x has reserved pages!*/
 	if (!f->reserved_pages || dest + len <= tf->length - len) {