Fix: ADI structural cleanup and ARMv8-M debug improvements#2010

Merged

esden merged 21 commits intomainfrom fix/adi-structural-cleanup

Dec 9, 2024

+248-143

Commits on Dec 8, 2024

adi: Tidy up and better integrate the CoreSight ROM handling into the component lookup mechanism
dragonmux
committed
adiv6: Refactored the ROM table handling in the same way as the ADI handling was
dragonmux
committed
adi: Lifted the component validity check to simplify the code flow a little and reduce indentation
dragonmux
committed
cortexm: Narrowed the FPB revision member in the priv structure as it only ever uses 4 bits
dragonmux
committed
cortexm: Cleaned up the breakpoint and watchpoint setup logic with some defines for the magic numbers involved and comments
dragonmux
committed
cortexm: Make proper use of the halt checking machinery in cortexm_attach() so we can be sure we actually halted the core before doing things that require it to be halted
dragonmux
committed
cortexm: Limited cache operations to only when the appropriate caches are actually enabled, checking which are when the core halts
dragonmux
committed
cortexm: Added documentation for how the breakpoint part of cortexm_breakwatch_set() works
dragonmux
committed
cortexm: Fixed some clang-tidy warnings about variable naming, and fixed a type issue
dragonmux
committed
cortexm: Refactored out the breakpoint logic into its own function from cortexm_breakwatch_set()
dragonmux
committed
cortexm: Refactored out the watchpoint logic into its own function from cortexm_breakwatch_set()
dragonmux
committed
cortexm: const correctness and documentation for cortexm_breakwatch_clear()
dragonmux
committed
adi: Added a missing static on adi_configure_mem_ap()
dragonmux
committed
gdb_main: Fixed some clang-tidy lints and a variable naming issue
dragonmux
committed
adiv5_swd: Fixed a typo in the JTAG to dormant sequence logic
dragonmux
committed
cortexm: Improved the definitions for the DHCSR to include the ARMv8-M bits and define what all the bits actually do with comments
dragonmux
committed
gdb_main: Fixed a warning about variable name choice for the single register read handler
dragonmux
committed
gdb_main: Documentation and style cleanup
dragonmux
committed
gdb_main: Use the threads form of halt responses to solve a GDB issue with it having to guess which thread we're reporting for, causing some funky behaviour
dragonmux
committed
cortexm: Fixed some missing unsigned suffixes on some constants for the DWT handling
dragonmux
committed
target: Added instrumentation to the target halt/resume/attach/detach functions for helping nagivate target debugging issues in the future
dragonmux
committed

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Fix: ADI structural cleanup and ARMv8-M debug improvements#2010

Commits on Dec 8, 2024

adi: Tidy up and better integrate the CoreSight ROM handling into the component lookup mechanism

adiv6: Refactored the ROM table handling in the same way as the ADI handling was

adi: Lifted the component validity check to simplify the code flow a little and reduce indentation

cortexm: Narrowed the FPB revision member in the priv structure as it only ever uses 4 bits

cortexm: Cleaned up the breakpoint and watchpoint setup logic with some defines for the magic numbers involved and comments

cortexm: Make proper use of the halt checking machinery in `cortexm_attach()` so we can be sure we actually halted the core before doing things that require it to be halted

cortexm: Limited cache operations to only when the appropriate caches are actually enabled, checking which are when the core halts

cortexm: Added documentation for how the breakpoint part of `cortexm_breakwatch_set()` works

cortexm: Fixed some `clang-tidy` warnings about variable naming, and fixed a type issue

cortexm: Refactored out the breakpoint logic into its own function from `cortexm_breakwatch_set()`

cortexm: Refactored out the watchpoint logic into its own function from `cortexm_breakwatch_set()`

cortexm: `const` correctness and documentation for `cortexm_breakwatch_clear()`

adi: Added a missing `static` on `adi_configure_mem_ap()`

gdb_main: Fixed some `clang-tidy` lints and a variable naming issue

adiv5_swd: Fixed a typo in the JTAG to dormant sequence logic

cortexm: Improved the definitions for the DHCSR to include the ARMv8-M bits and define what all the bits actually do with comments

gdb_main: Fixed a warning about variable name choice for the single register read handler

gdb_main: Documentation and style cleanup

gdb_main: Use the threads form of halt responses to solve a GDB issue with it having to guess which thread we're reporting for, causing some funky behaviour

cortexm: Fixed some missing unsigned suffixes on some constants for the DWT handling

target: Added instrumentation to the target halt/resume/attach/detach functions for helping nagivate target debugging issues in the future