The Electronic CAD & Reliability Group is a research group inside the Department of Control and Computer Engineering (DAUIN) of Politecnico di Torino. Its mission is to support, through techniques, tools, and services, the designer of electronic circuits and systems. The research conducted by the group spans the whole spectrum of classical computer-aided design topics, with particular emphasis on testing, fault tolerance, and validation of digital circuits and systems described at various levels of abstraction.
CAD & Reliability Group
Works produced by the CAD & Reliability group of the Department of Control and Computer Engineering (DAUIN) of Politecnico di Torino
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- SFIadvancedmodels Public
cad-polito-it/SFIadvancedmodels’s past year of commit activity - r4ves Public
RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.
cad-polito-it/r4ves’s past year of commit activity - x-heep-tflite-cfoshw24 Public
cad-polito-it/x-heep-tflite-cfoshw24’s past year of commit activity - x-heep-femu-tflite-sdk Public Forked from esl-epfl/x-heep-femu-sdk
X-HEEP-based FPGA EMUlation Platform (FEMU) Software Development Kit (SDK) with Tensorflow Lite for Microcontrollers support.
cad-polito-it/x-heep-femu-tflite-sdk’s past year of commit activity - tflite-micro-x-heep Public
cad-polito-it/tflite-micro-x-heep’s past year of commit activity - cv32e40p_tftlab Public Forked from openhwgroup/cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
cad-polito-it/cv32e40p_tftlab’s past year of commit activity