Chisel v5.0.0-RC1

Features

• Add EphemeralSimulator API (by @GeorgeLyon in #3142)
  • Introduce chisel3.simulator.EphemeralSimulator for ephemeral scenarios (such as scala-cli)
• [svsim] Add option to wait for a VCS license if one is unavailable (by @GeorgeLyon in #3149)
• intmodule exporting (by @darthscsi in #3148)
  Generate implementation-specific intirnsics.
• Implement typeName API for stable Module names (by @jared-barocsi in #3130)
  This gives a flexible way to generate a stable name for a Chisel type, which is useful for problems like generating stable names for Modules and Queues
• More Circt intrinsic wrappers (IsX, PlusArgsTest, PlusArgsValue) (by @darthscsi in #2958)
  Add support for Circt intrinsics.
• Added .exclude to Connectable (by @azidar in #3172)
  Added .exclude mechanism on Connectable to enable never connecting to/from the marked fields using any connectable operator.
• Add an annotation for specifying module port conventions (by @rwy7 in #3030)
• Patch VecInit.fill(0) invocation to successfully compile and yield a zero-width Vec (by @jared-barocsi in #3171)
  Fix VecInit.fill(0) calls so that they compile and yield 0-width Vecs

API Modification

• Fix Printf macro to catch s-interpolator usages in Scala 2.13 (by @adkian-sifive in #3143)
  Fix issue with printf macro error checking to catch s-interpolator usages in Scala 2.13
• Remove _compatAutoWrapPorts no-op method (by @seldridge in #3164)
• Emit annotations in the .fir file (by @jackkoenig in #3180)
  • Annotations are now emitted in the .fir file instead of in an auxiliary .anno.json file.
  • Serialized FIRRTL is now spec v2.0.0

API Deprecation

• Deprecate ChiselStage$.elaborate (by @seldridge in #3160)
• Deprecate Scala 2.12 in Chisel 3.6 through the compiler plugin (by @jared-barocsi in #3146)
  Deprecate Scala 2.12 for Chisel 3.6 and later versions

Fixes

• Fix naming for RHS of named unapply expressions (by @jackkoenig in #3163)
  This results in previously unnamed signals receiving names from the compiler plugin.
• Report firtool version when firtool invocation errors (by @jackkoenig in #3174)

Documentation

• mdoc-ify intrinsic explanation (by @mwachs5 in #3152)
  Use mdoc to compile check the intrinsics explanation doc
• update website and explanations menus to match eachother (by @mwachs5 in #3154)
  [Website] Update Explanation Menus to align with eachother
• Fix three broken links in README.md Documentation section (by @aswaterman in #3166)
• [CI] Add Release Notes Automation (by @jackkoenig in #3170)
• Update README.md for Chisel 5 (by @jackkoenig in #3093)

Dependency Updates

• Bump to firtool 1.37.0 (by @jackkoenig in #3155)
• Bump to firtool 1.38.0 (by @jackkoenig in #3179)
  See firtool release notes.

Build and Internal Changes

• [CI] Revamp VecSpec (by @jackkoenig in #3159)
• Added definition identifiers (by @azidar in #3135)
• [CI] Require PRs to main to be labeled (by @jackkoenig in #3168)
• [CI] Install firtool in the publish step (by @jackkoenig in #3176)
• rewrite mill build scripts for chisel5. (by @sequencer in #3045)

Full Changelog: v5.0.0-M2...v5.0.0-RC1