Chisel v6.0.0-RC1
Pre-release
Pre-release
Features
- Add Map properties (by @albertchen-sifive in #3505)
- add Double property type (by @albertchen-sifive in #3508)
- add Path property type (by @albertchen-sifive in #3511)
- add DedupGroupAnnotation (by @albertchen-sifive in #3500)
- add tuple properties (by @albertchen-sifive in #3513)
- Map Properties now support Properties as the key (by @jackkoenig in #3518)
- make PropertyType public, add Path factory method (by @albertchen-sifive in #3516)
- Add
AnyRef
type and reworkPropertyType.getPropertyType
(by @albertchen-sifive in #3522) - Implement FIRRTL type alias mechanism for Bundles (by @jared-barocsi in #3445)
AddaliasName
to Bundles: a way for users to define a type alias for a bundle type, resulting in the emission and usage of alias type statements in FIRRTL. - Implement auto typeName generation for Records (by @jared-barocsi in #3504)
Add experimentalHasAutoTypename
trait - Allows users to automatically generate a
typeName
forBundle
objects through the compiler plugin. - Make FlatIO work (as IO) for non-Record Data (by @seldridge in #3538)
- Add FixedIORawModule, FixedIOBlackBox (by @seldridge in #3535)
- Add optional group API (by @seldridge in #3541)
- Add DedupGroupAnnotation phase (by @adkian-sifive in #3545)
AddDedupGroupAnnotation
phase that generates deduplication groups based on moduledesiredNames
- Support probe-define in monoconnects (by @rwy7 in #3566)
- Enable mono/
:=
connects for probes, which will emit a ProbeDefine.
- Enable mono/
- Also enables the fancier connect forms
- A "Probe" will be connected at the root
- Add new target API to get a target relative to a specific BaseModule. (by @mikeurbach in #3581)
The new toRelativeTarget API augments the existing toAbsoluteTarget API, to provide a mechanism to get hierarchical paths to a NamedComponent relative to a known root. - Support wire-of-probe. (by @dtzSiFive in #3592)
Allow creation of wire of probe, not in specification but supported by CIRCT. - Added disallowIOCreation as a public API (by @azidar in #3575)
Enable users to lock-down the IO-creation of any module by callingdisallowIOCreation()
. This is useful for building chisel libraries which desire this behavior, but don't want to force a user to declare the entire IO in one bundle. - Support instanceName on HasId without a component by using localName. (by @mikeurbach in #3623)
We have recently reworked when HasIds are named within a module so they can be named before atModuleBodyEnd executes, and then get referenced within atModuleBodyEnd. However, the component is still not set when they are referenced, so in this case use the local name. - Add source locators to all subclasses of BaseModule (by @jackkoenig in #3624)
The source locators point to the name of the class extends Module, RawModule, BlackBox, ExtModule, or Class. They are included in the output FIRRTL. - Add SparseVec (by @seldridge in #3619)
- Support Instance for Definitions of Classes. (by @mikeurbach in #3628)
This allows safe references to Objects, as well as type-safe field accessors to connect inputs or outputs via@instantiable
and@pulic
. - DataMirror.isFullyAligned: add method to check data is all aligned. (by @dtzSiFive in #3613)
Add new DataMirror.isFullyAligned for checking if all members are aligned w.r.t. the given base. - dontTouch should default to leaf marking rather than aggregate marking to match current behavior (by @darthscsi in #3675)
Don't touch is becoming stricter. Specifically type lowering and don't touch of aggregates are in conflict.dontTouch
will maintain the same behavior by default by applyingdontTouch
to every leaf when the argument is an Aggregate. The new argumentmarkAgg
can be set totrue
to havedontTouch
mark the Aggregate instead.
API Modification
- Property now extends Data, remove BaseType (by @jackkoenig in #3514)
Properties can be fields of Bundles and used in wires. - MixedVec subclasses immutable.IndexedSeq (by @mwachs5 in #3539)
Change MixedVec to inherit from collection.immutable.IndexedSeq, so that it can work for Seq[Data]. - remove clock and cond from probe force/release API (by @debs-sifive in #3605)
Removeclock
andcond
from probeforce
andrelease
methods. - Remove Map and Tuple property types. (by @mikeurbach in #3627)
These property types weren't necessary in the end. A Map can easily be represented by a list of object with two fields, and this is how it's been done downstream. Similarly, a Tuple can easily be represented by an object with two fields, and this is how it's been done downstream. Remove these to simplify Chisel and reduce maintainence burden. - Rename "groups" to "layers" (by @seldridge in #3632)
- Make SRAM ports public (by @debs-sifive in #3652)
MakeMemoryWritePort
andMemoryReadWritePort
classes publicly accessible.
Backend Code Generation
- Aggregate literals now materialize const wires (by @trilorez in #3515)
Aggregate literals now materializeconst
wires. This will facilitate further support forconst
in operations and the type system in the future. - firrtl: Emit under 3.2.0 (not released) to cover property features. (by @dtzSiFive in #3517)
Bump FIRRTL version to unreleased 3.2.0 to cover experimental features emitted. - Additional checks in probe packagae (by @debs-sifive in #3610)
Error instead of emitting RW/ProbeValues on literals. - Don't emit nodes when calling .asBool on a Bool (by @jackkoenig in #3637)
This results in a slight improvement to emitted FIRRTL quality
Fixes
- Allow properties on ExtModule IO (by @seldridge in #3510)
- Improve error messages involving views (by @jackkoenig in #3536)
This improves error messages involving views where the view maps to a single Data. The error messages on legacy connections (:= and <>) involving views that do not correspond 1-1 with a single target Data are still bad, but connectables (eg. :#=) do benefit even in that case. - [Binder] Corrent
chirrtl.memoryport
position (by @SpriteOvO in #3544) - Fix DataMirror.internal.chiselTypeClone to preserve Scala type (by @jackkoenig in #3553)
- Partial fix for probe and Decoupled interaction + demo of workaround (by @debs-sifive in #3558)
Coerces tapAndRead to punch stripped-direction flips when punching downwards with Inward non-probe ports, Fixes #3556 - Fix 'Malformed class name' errors in typeName and related implementations (by @jared-barocsi in #3533)
- Introduce a
simpleClassName
utility object that emulates agetClass.getSimpleName
call without throwingMalformed class name
exceptions when Java 8 is used.typeName
and all related implementations use this function now instead ofgetClass.getSimpleName
.
- Introduce a
HasAutoTypename
can no longer be mixed into an anonymousRecord
; the compiler plugin now reports this as a compilation error.- Fix and test probe of ChiselEnum. (by @dtzSiFive in #3560)
Fix probe of ChiselEnum. - Fix BoringUtils.bore can not bore from a Probe (by @sequencer in #3512)
- Fix Decodetable (by @sequencer in #3563)
- Don't add DedupGroupAnnotation to intrinsics (by @mikeurbach in #3590)
- Bugfix: foo and foo_ names cause incorrect prefix calculation (by @azidar in #3600)
Namingfoo
and thenfoo_
will no longer trigger an error. - Don't add DedupGroupAnnotation to classes. (by @mikeurbach in #3604)
Class definition components cannot have any annotations. - Updated Path property target type serialization. (by @mikeurbach in #3601)
This includes two changes to how Path property target types are serialized:
- For ModuleTargets, use the OMInstanceTarget target type, like for InstanceTargets
- Add a new API to request "member" target types
- set sample_element's probeInfo for Vecs (by @debs-sifive in #3611)
ForVec
s, also set theprobeInfo
of theirsample_element
, which is used to determine its element type. - Add type ascription to implicits from instantiable (by @jackkoenig in #3615)
This fixes Scala compiler warnings in Scala 2.13.12 requiring type ascriptions on public implicit definitions. - Enable checkConnect for Property types in MonoConnect. (by @mikeurbach in #3635)
Property types never actually called the helper that was factored out of MonoConnect specifically for them. Upon adding this, it turned out that they never had assignCompatDir called either, and this was leaving directions unspecified in aggregates. Both of these have probably lingered since Property types were made subclasses of Data again. This addresses both omissions, leading to earlier error checking for Property type connections.
Documentation
- [website] Fix link from Warnings to Cookbook (by @jackkoenig in #3524)
- Fix HasTypeAlias cookbook typos (by @jared-barocsi in #3525)
- Add unit test demonstrating BoringUtils.tap with D/I (by @debs-sifive in #3540)
- Changed Array to Seq in MuxLookup explantation (by @madsrumlenordstrom in #3547)
- [docs] Switch API docs hosting from javadoc.io to sonatype (by @jackkoenig in #3568)
- [ci] Record published version in step summary (by @jackkoenig in #3645)
- [docs] Migrate website to Docusaurus (by @jackkoenig in #3646)
Introducing a complete facelift of the Chisel website, now built with Docusaurus 3.0. - Better reference to the Chisel book. (by @schoeberl in #3649)
- [website] Add robots.txt (by @jackkoenig in #3650)
This will hopefully make the Algolia web crawler work. - [website] Docusaurus set trailingSlash to false (by @jackkoenig in #3653)
- [website] Enable Algolia-powered search (by @jackkoenig in #3651)
- [website] docs/introduction => docs/index, add redirects (by @jackkoenig in #3656)
- [website] More redirects (by @jackkoenig in #3657)
Redirect links with.html
or.htm
(remove the extension). Do this same redirect for old website/chisel3/...
links as well. - [docs] Update README after 5.1.0 release (by @jackkoenig in #3660)
- [website] Generate links to ScalaDoc for API page (by @jackkoenig in #3661)
The website will now actual reflect the latest snapshot and releases on the API page - [website] Self-host latest [stable] API docs (by @jackkoenig in #3665)
This should enable them to be indexed and thus searchable as part of the website (both by Algolia and by Google). - Fix spelling error in Layers documentation layers.md (by @t14916 in #3673)
Dependency Updates
- [cd] Bump CIRCT from firtool-1.52.0 to firtool-1.53.0 (by @chiselbot in #3519)
- [cd] Bump CIRCT from firtool-1.53.0 to firtool-1.54.0 (by @chiselbot in #3526)
- Add support for Scala 2.13.12 to the compiler plugin (by @jackkoenig in #3527)
- Bump to Scala 2.13.12 (by @jackkoenig in #3531)
- [cd] Bump CIRCT from firtool-1.54.0 to firtool-1.55.0 (by @chiselbot in #3537)
- [cd] Bump CIRCT from firtool-1.55.0 to firtool-1.56.0 (by @chiselbot in #3543)
- [cd] Bump CIRCT from firtool-1.56.0 to firtool-1.56.1 (by @chiselbot in #3546)
- [cd] Bump CIRCT from firtool-1.56.1 to firtool-1.57.0 (by @chiselbot in #3576)
- [cd] Bump CIRCT from firtool-1.57.0 to firtool-1.57.1 (by @chiselbot in #3584)
- [cd] Bump CIRCT from firtool-1.57.1 to firtool-1.58.0 (by @chiselbot in #3603)
- [cd] Bump CIRCT from firtool-1.58.0 to firtool-1.59.0 (by @chiselbot in #3625)
- [cd] Bump CIRCT from firtool-1.59.0 to firtool-1.60.0 (by @chiselbot in #3679)
- [cd] Bump CIRCT from firtool-1.60.0 to firtool-1.61.0 (by @chiselbot in #3681)
Build and Internal Changes
- Implement Verilog output stream
PanamaCIRCTConverter
(by @SpriteOvO in #3520) - move panama codegen to txt files (by @sequencer in #3595)
- use flake input to provide circt source (by @sequencer in #3597)
- Alignment: Don't require a Connectable base, split. (by @dtzSiFive in #3612)
DataMirror methods relating to alignment such ascollectAlignedDeep
) no longer require Data to be Hardware and may be used on bare Chisel types. - Add type specifier on AddDedupGroupAnno phase optionalPrerequisites (by @adkian-sifive in #3614)
Add type specifier to optionalPrerequisites in AddDedupGroupAnnotations phase - Add type ascriptions to public implicit definitions (by @jackkoenig in #3616)
- [NFC] prune dead imports (by @darthscsi in #3674)
- Make Property an Element. (by @mikeurbach in #3676)
This is the right place in the Chisel type hierarchy for Property as it exists today. Property types can be used in Aggregates, and are not themselves Aggregates in their current form. Making Property extend Element allows much of Chisel's internal reflection to work as expected when Property types are used in Aggregates.
Uncategorized
- add direnv and vscode to gitignore (by @sequencer in #3667)
Full Changelog: v6.0.0-M3...v6.0.0-RC1