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This project contains RTL codes written in Verilog of Convolutional Neural Network (CNN) Operation

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christianreivan/CNN-Processor-Module

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CNN-Processor-Module

INTRO

This project is addressed to design an Eyeris-based AI processor module. Operation uses Convolutional Neural Network (CNN) concept with the illustration as following 1:

CNN Illustration

Operation is done between 2x2 filter matrix and 2x2 input matrix as shown in the figure below 1:

image

To make the operation simpler, we first convert the 3x3 fmap input matrix to toeplitz matrix. By doing that, we translate the original convolutional operation and windowing shift into ordinary matrix multiplications as depicted below 1:

image

Checklists

  • Design simple Convolutional Neural Network (CNN) operation for Eyeris-based AI processor module with pipelining and folding architecture
  • Translate block diagrams into RTL codes.
  • Create design was behaviorally simulated in Quartus and Modelsim.

ALERT

Should you intend to use all the RTL codes, please do not forget to cite the author as:

-- This project was originally created by Christian Reivan, Bandung Institute of Technology.   
-- Created from October to November 2021.
-- I, hereby, declare that this RTL code is not used for any illegal or prohibited use.   

References

Footnotes

  1. http://eyeriss.mit.edu/tutorial.html 2 3

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This project contains RTL codes written in Verilog of Convolutional Neural Network (CNN) Operation

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