Basic RV32I CPU

Some key directories are shown below.

|--rom_src/         ## Assembly source code
|--src/             ## Verilog source code
  |--rom/
    |--program.hex  ## Program to be loaded into the Instruction Memory
|--test/            ## Testbench to run the simulation
|--Makefile         ## Makefile for building and running sim targets

Dependencies

• Simulator: Verilator
• Assembler: RV32IAS

Getting Started

$ git clone https://github.com/davidli218/basic-rv32i-cpu
$ cd basic-rv32i-cpu/
$ make