OpenLane is an ASIC infrastructure library based on several components including OpenROAD, Yosys, Magic, Netgen, CVC, KLayout and a number of custom scripts for design exploration and optimization.
A reference flow, "Classic", performs all ASIC implementation steps from RTL all the way down to GDSII.
You can find the documentation here to get started. You can discuss OpenLane 2 in the #openlane-2 channel of the Efabless Open Source Silicon Slack.
timeline
title The OpenLane Infrastructure
RTL to Netlist
: Linting / Verilator
: Power Distribution Network Hierarchy / Yosys
: Synthesis / Yosys
: Synthesis / Design Compiler (with proprietary plugin)
: Multi-corner Netlist STA / OpenSTA
Floorplanning
: Floorplan Initialization / OpenROAD
: Manual Macro Placement / OpenDB
: Tap/Endcap Insertion / OpenROAD
: PDN Generation / OpenROAD
Placement
: Pin Placement (from config file) / OpenROAD, OpenDB
: Pin Placement (Random/Matching/Annealing) / OpenROAD
: Pin Placement (from template DEF) / OpenDB
: Global Placement / OpenROAD
: Resizer Design Repair (Post-GPL) / OpenROAD
: Detailed Placement / OpenROAD
Clock Tree Synthesis
: Clock-Tree Synthesis / OpenROAD
: Resizer Timing Repair (Post-CTS) / OpenROAD
Routing
: Global Routing / OpenROAD
: Resizer Design Repair (Post-GRT) / OpenROAD
: Diode Insertion on Ports / OpenDB
: Heuristic Diode Insertion / OpenDB
: Antenna Repair / OpenROAD
: Resizer Timing Repair (Post-GRT) / OpenROAD
: Detailed Routing / OpenROAD
: Row Filling / OpenROAD
Signoff (Timing)
: Parasitics Extraction / OpenROAD
: Multi-corner Static Timing Analysis / OpenSTA
: SI-Enabled Multi-corner Static Timing Analysis / PrimeTime (with proprietary plugin)
Signoff (Physical)
: GDSII Stream-Out / Magic
: GDSII Stream-Out / KLayout
: Magic vs. KLayout Stream XOR / KLayout
: Design Rule Checks / Magic
: Design Rule Checks / KLayout
: Spice Extraction / Magic
: Layout vs. Schematic / Netgen
: Equivalence Check (Alpha) / Yosys EQY
You can try OpenLane right in your browser, free-of-charge, using Google Colaboratory by following this link.
You'll need the following:
- Python 3.8 or higher with PIP, Venv and Tkinter
Works for macOS and Linux (x86-64 and aarch64). Recommended, as it is more integrated with your filesystem and overall has less upload and download deltas.
See Nix-based installation in the docs for more info.
Works for Windows, macOS and Linux (x86-64 and aarch64).
See Docker-based installation in the docs for more info.
Do note you'll need to add --dockerized right after openlane in most CLI
invocations.
You'll need to bring your own compiled utilities, but otherwise, simply install OpenLane as follows:
python3 -m pip install --upgrade openlanePython-only installations are presently unsupported and entirely at your own risk.
In the root folder of the repository, you may invoke:
python3 -m openlane --pdk-root <path/to/pdk> </path/to/config.json>To start with, you can try:
python3 -m openlane --pdk-root $HOME/.volare ./designs/spm/config.jsonIf you use OpenLane in your research, please cite the following paper.
- M. Shalan and T. Edwards, “Building OpenLANE: A 130nm OpenROAD-based Tapeout-Proven Flow: Invited Paper,” 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), San Diego, CA, USA, 2020, pp. 1-6. Paper
@INPROCEEDINGS{9256623,
author={Shalan, Mohamed and Edwards, Tim},
booktitle={2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)},
title={Building OpenLANE: A 130nm OpenROAD-based Tapeout- Proven Flow : Invited Paper},
year={2020},
volume={},
number={},
pages={1-6},
doi={}}The Apache License, version 2.0.
Docker images distributed by Efabless Corporation under the same license.
Binaries bundled with OpenLane either via Cachix or Docker are distributed by Efabless Corporation and may fall under stricter open source licenses.
