Skip to content

Commit

Permalink
riscv port refactor
Browse files Browse the repository at this point in the history
  • Loading branch information
@feilongjiang
feilongjiang committed Sep 27, 2024
1 parent 6fb36e5 commit 1297f60
Showing 1 changed file with 45 additions and 63 deletions.
108 changes: 45 additions & 63 deletions src/hotspot/cpu/riscv/gc/g1/g1_riscv.ad
View file
Original file line number Diff line number Diff line change
Expand Up @@ -162,11 +162,11 @@ instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp t
ins_pipe(istore_reg_mem);
%}

instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
%{
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
effect(TEMP res, TEMP tmp1, TEMP tmp2);
ins_cost(2 * VOLATILE_REF_COST);
format %{ "cmpxchg $res = $mem, $oldval, $newval\t# ptr" %}
ins_encode %{
Expand All @@ -179,28 +179,26 @@ instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP
write_barrier_pre(masm, this,
noreg /* obj */,
$oldval$$Register /* pre_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::int64,
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
$mem$$Register /* store_addr */,
$newval$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
%}

instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
%{
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
effect(TEMP res, TEMP tmp1, TEMP tmp2);
ins_cost(VOLATILE_REF_COST);
format %{ "cmpxchg_acq $res = $mem, $oldval, $newval\t# ptr" %}
ins_encode %{
Expand All @@ -213,19 +211,17 @@ instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRe
write_barrier_pre(masm, this,
noreg /* obj */,
$oldval$$Register /* pre_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::int64,
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
$mem$$Register /* store_addr */,
$newval$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
%}
Expand All @@ -248,15 +244,13 @@ instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN
$tmp3$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::uint32,
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register);
__ decode_heap_oop($tmp2$$Register);
__ decode_heap_oop($tmp1$$Register, $newval$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp1$$Register /* new_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
Expand All @@ -280,26 +274,24 @@ instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRe
$tmp3$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::uint32,
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register);
__ decode_heap_oop($tmp2$$Register);
__ decode_heap_oop($tmp1$$Register, $newval$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp1$$Register /* new_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
%}

instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegP oldval)
instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
%{
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
effect(TEMP res, TEMP tmp1, TEMP tmp2);
ins_cost(2 * VOLATILE_REF_COST);
format %{ "cmpxchg $mem, $oldval, $newval\t# (ptr)\n\t"
"mv $res, $res == $oldval" %}
Expand All @@ -310,30 +302,28 @@ instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp
write_barrier_pre(masm, this,
noreg /* obj */,
$oldval$$Register /* pre_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::int64,
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register,
/*result as bool*/ true);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
$mem$$Register /* store_addr */,
$newval$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
%}

instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegP oldval)
instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
%{
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
effect(TEMP res, TEMP tmp1, TEMP tmp2);
ins_cost(VOLATILE_REF_COST);
format %{ "cmpxchg_acq $mem, $oldval, $newval\t# (ptr)\n\t"
"mv $res, $res == $oldval" %}
Expand All @@ -344,20 +334,18 @@ instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNo
write_barrier_pre(masm, this,
noreg /* obj */,
$oldval$$Register /* pre_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::int64,
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
/*result as bool*/ true);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
$mem$$Register /* store_addr */,
$newval$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp2$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
%}
Expand All @@ -382,16 +370,14 @@ instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp
$tmp3$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::uint32,
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register,
/*result as bool*/ true);
__ decode_heap_oop($tmp2$$Register);
__ decode_heap_oop($tmp1$$Register, $newval$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp1$$Register /* new_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
Expand All @@ -417,16 +403,14 @@ instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNo
$tmp3$$Register /* tmp2 */,
RegSet::of($mem$$Register, $oldval$$Register, $newval$$Register) /* preserve */,
RegSet::of($res$$Register) /* no_preserve */);
__ mv($tmp1$$Register, $oldval$$Register);
__ mv($tmp2$$Register, $newval$$Register);
__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register, Assembler::uint32,
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
/*result as bool*/ true);
__ decode_heap_oop($tmp2$$Register);
__ decode_heap_oop($tmp1$$Register, $newval$$Register);
write_barrier_post(masm, this,
$mem$$Register /* store_addr */,
$tmp2$$Register /* new_val */,
$tmp1$$Register /* tmp1 */,
$tmp1$$Register /* new_val */,
$tmp2$$Register /* tmp1 */,
$tmp3$$Register /* tmp2 */);
%}
ins_pipe(pipe_slow);
Expand Down Expand Up @@ -540,8 +524,6 @@ instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp t

instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2)
%{
// This instruction does not need an acquiring counterpart because it is only
// used for reference loading (Reference::get()). The same holds for g1LoadN.
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
match(Set dst (LoadP mem));
effect(TEMP dst, TEMP tmp1, TEMP tmp2);
Expand All @@ -564,7 +546,7 @@ instruct g1LoadN(iRegNNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, iR
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
match(Set dst (LoadN mem));
effect(TEMP dst, TEMP tmp1, TEMP tmp2, TEMP tmp3);
ins_cost(VOLATILE_REF_COST);
ins_cost(LOAD_COST + BRANCH_COST);
format %{ "lwu $dst, $mem\t# compressed ptr" %}
ins_encode %{
guarantee($mem$$disp == 0, "impossible encoding");
Expand Down

0 comments on commit 1297f60

Please sign in to comment.