Skip to content

Commit

Permalink
RISC-V: Minimal build failed after JDK-8316592
Browse files Browse the repository at this point in the history
  • Loading branch information
feilongjiang committed Nov 22, 2023
1 parent 5e81831 commit 1e131a2
Show file tree
Hide file tree
Showing 2 changed files with 21 additions and 21 deletions.
35 changes: 18 additions & 17 deletions src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2048,23 +2048,6 @@ void MacroAssembler::cmp_klass(Register oop, Register trial_klass, Register tmp1
beq(trial_klass, tmp1, L);
}

// Multiply and multiply-accumulate unsigned 64-bit registers.
void MacroAssembler::wide_mul(Register prod_lo, Register prod_hi, Register n, Register m) {
assert_different_registers(prod_lo, prod_hi);

mul(prod_lo, n, m);
mulhu(prod_hi, n, m);
}
void MacroAssembler::wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2) {
assert_different_registers(sum_lo, sum_hi);
assert_different_registers(sum_hi, tmp2);

wide_mul(tmp1, tmp2, n, m);
cad(sum_lo, sum_lo, tmp1, tmp1); // Add tmp1 to sum_lo with carry output to tmp1
adc(sum_hi, sum_hi, tmp2, tmp1); // Add tmp2 with carry to sum_hi
}

// Move an oop into a register.
void MacroAssembler::movoop(Register dst, jobject obj) {
int oop_index;
Expand Down Expand Up @@ -3576,6 +3559,24 @@ void MacroAssembler::mul_add(Register out, Register in, Register offset,
bind(L_end);
}

// Multiply and multiply-accumulate unsigned 64-bit registers.
void MacroAssembler::wide_mul(Register prod_lo, Register prod_hi, Register n, Register m) {
assert_different_registers(prod_lo, prod_hi);

mul(prod_lo, n, m);
mulhu(prod_hi, n, m);
}

void MacroAssembler::wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2) {
assert_different_registers(sum_lo, sum_hi);
assert_different_registers(sum_hi, tmp2);

wide_mul(tmp1, tmp2, n, m);
cad(sum_lo, sum_lo, tmp1, tmp1); // Add tmp1 to sum_lo with carry output to tmp1
adc(sum_hi, sum_hi, tmp2, tmp1); // Add tmp2 with carry to sum_hi
}

// add two unsigned input and output carry
void MacroAssembler::cad(Register dst, Register src1, Register src2, Register carry)
{
Expand Down
7 changes: 3 additions & 4 deletions src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -198,10 +198,6 @@ class MacroAssembler: public Assembler {
void store_klass(Register dst, Register src, Register tmp = t0);
void cmp_klass(Register oop, Register trial_klass, Register tmp1, Register tmp2, Label &L);

void wide_mul(Register prod_lo, Register prod_hi, Register n, Register m);
void wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2);

void encode_klass_not_null(Register r, Register tmp = t0);
void decode_klass_not_null(Register r, Register tmp = t0);
void encode_klass_not_null(Register dst, Register src, Register tmp);
Expand Down Expand Up @@ -1204,6 +1200,9 @@ class MacroAssembler: public Assembler {
#ifdef COMPILER2
void mul_add(Register out, Register in, Register offset,
Register len, Register k, Register tmp);
void wide_mul(Register prod_lo, Register prod_hi, Register n, Register m);
void wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2);
void cad(Register dst, Register src1, Register src2, Register carry);
void cadc(Register dst, Register src1, Register src2, Register carry);
void adc(Register dst, Register src1, Register src2, Register carry);
Expand Down

0 comments on commit 1e131a2

Please sign in to comment.