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replace la_patchable + jalr with far_call/far_jump and rename la_patc…
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…hable into auipc
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feilongjiang committed Nov 22, 2023
1 parent 5e81831 commit 522c15b
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Showing 14 changed files with 75 additions and 188 deletions.
9 changes: 2 additions & 7 deletions src/hotspot/cpu/riscv/c1_CodeStubs_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ void C1SafepointPollStub::emit_code(LIR_Assembler* ce) {
InternalAddress safepoint_pc(__ pc() - __ offset() + safepoint_offset());
__ relocate(safepoint_pc.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, safepoint_pc.target(), offset);
__ auipc(t0, safepoint_pc.target(), offset);
__ addi(t0, t0, offset);
});
__ sd(t0, Address(xthread, JavaThread::saved_exception_pc_offset()));
Expand Down Expand Up @@ -92,12 +92,7 @@ void RangeCheckStub::emit_code(LIR_Assembler* ce) {
__ mv(t1, _array->as_pointer_register());
stub_id = Runtime1::throw_range_check_failed_id;
}
RuntimeAddress target(Runtime1::entry_for(stub_id));
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(ra, target, offset);
__ jalr(ra, ra, offset);
});
__ far_call(RuntimeAddress(Runtime1::entry_for(stub_id)));
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
debug_only(__ should_not_reach_here());
Expand Down
4 changes: 2 additions & 2 deletions src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1426,7 +1426,7 @@ void LIR_Assembler::throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmit
InternalAddress pc_for_athrow(__ pc());
__ relocate(pc_for_athrow.rspec(), [&] {
int32_t offset;
__ la_patchable(exceptionPC->as_register(), pc_for_athrow, offset);
__ auipc(exceptionPC->as_register(), pc_for_athrow, offset);
__ addi(exceptionPC->as_register(), exceptionPC->as_register(), offset);
});
add_call_info(pc_for_athrow_offset, info); // for exception handler
Expand Down Expand Up @@ -1860,7 +1860,7 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* arg
RuntimeAddress target(dest);
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, target, offset);
__ movptr(t0, target, offset);
__ jalr(x1, t0, offset);
});
}
Expand Down
14 changes: 2 additions & 12 deletions src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -67,12 +67,7 @@ int StubAssembler::call_RT(Register oop_result, Register metadata_result, addres
set_last_Java_frame(sp, fp, retaddr, t0);

// do the call
RuntimeAddress target(entry);
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t0, target, offset);
jalr(x1, t0, offset);
});
far_call(RuntimeAddress(entry));
bind(retaddr);
int call_offset = offset();
// verify callee-saved register
Expand Down Expand Up @@ -578,12 +573,7 @@ OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
Label retaddr;
__ set_last_Java_frame(sp, fp, retaddr, t0);
// do the call
RuntimeAddress addr(target);
__ relocate(addr.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, addr, offset);
__ jalr(x1, t0, offset);
});
__ far_call(RuntimeAddress(target));
__ bind(retaddr);
OopMapSet* oop_maps = new OopMapSet();
assert_cond(oop_maps != nullptr);
Expand Down
9 changes: 2 additions & 7 deletions src/hotspot/cpu/riscv/c2_CodeStubs_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ void C2SafepointPollStub::emit(C2_MacroAssembler& masm) {
InternalAddress safepoint_pc(__ pc() - __ offset() + _safepoint_offset);
__ relocate(safepoint_pc.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, safepoint_pc.target(), offset);
__ auipc(t0, safepoint_pc.target(), offset);
__ addi(t0, t0, offset);
});
__ sd(t0, Address(xthread, JavaThread::saved_exception_pc_offset()));
Expand All @@ -60,12 +60,7 @@ int C2EntryBarrierStub::max_size() const {

void C2EntryBarrierStub::emit(C2_MacroAssembler& masm) {
__ bind(entry());
RuntimeAddress target(StubRoutines::method_entry_barrier());
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, target, offset);
__ jalr(ra, t0, offset);
});
__ far_call(RuntimeAddress(StubRoutines::method_entry_barrier()));

__ j(continuation());

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -308,12 +308,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm, Label* slo
Label skip_barrier;
__ beq(t0, t1, skip_barrier);

RuntimeAddress target(StubRoutines::method_entry_barrier());
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, target, offset);
__ jalr(ra, t0, offset);
});
__ far_call(RuntimeAddress(StubRoutines::method_entry_barrier()));

__ j(skip_barrier);

Expand Down
8 changes: 1 addition & 7 deletions src/hotspot/cpu/riscv/gc/x/xBarrierSetAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -339,13 +339,7 @@ void XBarrierSetAssembler::generate_c2_load_barrier_stub(MacroAssembler* masm, X
XSaveLiveRegisters save_live_registers(masm, stub);
XSetupArguments setup_arguments(masm, stub);

Address target(stub->slow_path());
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, target, offset);
__ jalr(x1, t0, offset);
});
}
__ far_call(Address(stub->slow_path()));

// Stub exit
__ j(*stub->continuation());
Expand Down
3 changes: 1 addition & 2 deletions src/hotspot/cpu/riscv/icBuffer_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -36,8 +36,7 @@

int InlineCacheBuffer::ic_stub_code_size() {
// 6: auipc + ld + auipc + jalr + address(2 * instruction_size)
// 5: auipc + ld + j + address(2 * instruction_size)
return (MacroAssembler::far_branches() ? 6 : 5) * NativeInstruction::instruction_size;
return 6 * NativeInstruction::instruction_size;
}

#define __ masm->
Expand Down
2 changes: 1 addition & 1 deletion src/hotspot/cpu/riscv/interp_masm_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ void InterpreterMacroAssembler::get_dispatch() {
ExternalAddress target((address)Interpreter::dispatch_table());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(xdispatch, target, offset);
auipc(xdispatch, target, offset);
addi(xdispatch, xdispatch, offset);
});
}
Expand Down
11 changes: 3 additions & 8 deletions src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,7 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
Address target(SafepointSynchronize::safepoint_counter_addr());
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(rcounter_addr, target, offset);
__ auipc(rcounter_addr, target, offset);
__ addi(rcounter_addr, rcounter_addr, offset);
});

Expand All @@ -96,7 +96,7 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
ExternalAddress target((address) JvmtiExport::get_field_access_count_addr());
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(result, target, offset);
__ auipc(result, target, offset);
__ lwu(result, Address(result, offset));
});
__ bnez(result, slow);
Expand Down Expand Up @@ -173,12 +173,7 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {

{
__ enter();
ExternalAddress target(slow_case_addr);
__ relocate(target.rspec(), [&] {
int32_t offset;
__ la_patchable(t0, target, offset);
__ jalr(x1, t0, offset);
});
__ far_call(ExternalAddress(slow_case_addr));
__ leave();
__ ret();
}
Expand Down
103 changes: 39 additions & 64 deletions src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -337,12 +337,7 @@ void MacroAssembler::call_VM_base(Register oop_result,
ld(t0, Address(java_thread, in_bytes(Thread::pending_exception_offset())));
Label ok;
beqz(t0, ok);
RuntimeAddress target(StubRoutines::forward_exception_entry());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t0, target, offset);
jalr(x0, t0, offset);
});
far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
bind(ok);
}

Expand Down Expand Up @@ -421,7 +416,7 @@ void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file,
ExternalAddress target(StubRoutines::verify_oop_subroutine_entry_address());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t1, target, offset);
auipc(t1, target, offset);
ld(t1, Address(t1, offset));
});
jalr(t1);
Expand Down Expand Up @@ -466,7 +461,7 @@ void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* f
ExternalAddress target(StubRoutines::verify_oop_subroutine_entry_address());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t1, target, offset);
auipc(t1, target, offset);
ld(t1, Address(t1, offset));
});
jalr(t1);
Expand Down Expand Up @@ -1564,7 +1559,7 @@ void MacroAssembler::reinit_heapbase() {
ExternalAddress target(CompressedOops::ptrs_base_addr());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(xheapbase, target, offset);
auipc(xheapbase, target, offset);
ld(xheapbase, Address(xheapbase, offset));
});
}
Expand Down Expand Up @@ -2136,7 +2131,7 @@ SkipIfEqual::SkipIfEqual(MacroAssembler* masm, const bool* flag_addr, bool value
ExternalAddress target((address)flag_addr);
_masm->relocate(target.rspec(), [&] {
int32_t offset;
_masm->la_patchable(t0, target, offset);
_masm->auipc(t0, target, offset);
_masm->lbu(t0, Address(t0, offset));
});
if (value) {
Expand Down Expand Up @@ -2910,46 +2905,36 @@ ATOMIC_XCHGU(xchgalwu, xchgalw)

#undef ATOMIC_XCHGU

void MacroAssembler::far_jump(Address entry, Register tmp) {
void MacroAssembler::far_jump(const Address &entry, Register tmp) {
assert(ReservedCodeCacheSize < 4*G, "branch out of range");
assert(CodeCache::find_blob(entry.target()) != nullptr,
"destination of far call not found in code cache");
assert(entry.rspec().type() == relocInfo::external_word_type
|| entry.rspec().type() == relocInfo::runtime_call_type
|| entry.rspec().type() == relocInfo::none, "wrong entry relocInfo type");
IncompressibleRegion ir(this); // Fixed length: see MacroAssembler::far_branch_size()
if (far_branches()) {
// We can use auipc + jalr here because we know that the total size of
// the code cache cannot exceed 2Gb.
relocate(entry.rspec(), [&] {
int32_t offset;
la_patchable(tmp, entry, offset);
jalr(x0, tmp, offset);
});
} else {
j(entry);
}
// Fixed length: see MacroAssembler::far_branch_size()
relocate(entry.rspec(), [&] {
int32_t offset;
auipc(tmp, entry, offset);
jalr(x0, tmp, offset);
});
}

void MacroAssembler::far_call(Address entry, Register tmp) {
void MacroAssembler::far_call(const Address &entry, Register tmp) {
assert(ReservedCodeCacheSize < 4*G, "branch out of range");
assert(CodeCache::find_blob(entry.target()) != nullptr,
"destination of far call not found in code cache");
assert(entry.rspec().type() == relocInfo::external_word_type
|| entry.rspec().type() == relocInfo::runtime_call_type
|| entry.rspec().type() == relocInfo::none, "wrong entry relocInfo type");
IncompressibleRegion ir(this); // Fixed length: see MacroAssembler::far_branch_size()
if (far_branches()) {
// We can use auipc + jalr here because we know that the total size of
// the code cache cannot exceed 2Gb.
relocate(entry.rspec(), [&] {
int32_t offset;
la_patchable(tmp, entry, offset);
jalr(x1, tmp, offset); // link
});
} else {
jal(entry); // link
}
// Fixed length: see MacroAssembler::far_branch_size()
// We can use auipc + jalr here because we know that the total size of
// the code cache cannot exceed 2Gb.
relocate(entry.rspec(), [&] {
int32_t offset;
auipc(tmp, entry, offset);
jalr(x1, tmp, offset); // link
});
}

void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass,
Expand Down Expand Up @@ -3172,14 +3157,14 @@ void MacroAssembler::load_byte_map_base(Register reg) {
mv(reg, (uint64_t)byte_map_base);
}

void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &offset) {
void MacroAssembler::auipc(Register reg, const Address &dest, int32_t &offset) {
unsigned long low_address = (uintptr_t)CodeCache::low_bound();
unsigned long high_address = (uintptr_t)CodeCache::high_bound();
unsigned long dest_address = (uintptr_t)dest.target();
long offset_low = dest_address - low_address;
long offset_high = dest_address - high_address;

assert(dest.getMode() == Address::literal, "la_patchable must be applied to a literal address");
assert(dest.getMode() == Address::literal, "auipc must be applied to a literal address");
assert((uintptr_t)dest.target() < (1ull << 48), "bad address");

// RISC-V doesn't compute a page-aligned address, in order to partially
Expand All @@ -3188,10 +3173,10 @@ void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &o
// [-(2G + 2K), 2G - 2K).
if (offset_high >= -((1L << 31) + (1L << 11)) && offset_low < (1L << 31) - (1L << 11)) {
int64_t distance = dest.target() - pc();
auipc(reg1, (int32_t)distance + 0x800);
auipc(reg, (int32_t)distance + 0x800);
offset = ((int32_t)distance << 20) >> 20;
} else {
movptr(reg1, dest.target(), offset);
movptr(reg, dest.target(), offset);
}
}

Expand Down Expand Up @@ -3222,22 +3207,14 @@ void MacroAssembler::reserved_stack_check() {
enter(); // RA and FP are live.
mv(c_rarg0, xthread);
RuntimeAddress target(CAST_FROM_FN_PTR(address, SharedRuntime::enable_stack_reserved_zone));
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t0, target, offset);
jalr(x1, t0, offset);
});
far_call(target);
leave();

// We have already removed our own frame.
// throw_delayed_StackOverflowError will think that it's been
// called by our caller.
target = RuntimeAddress(StubRoutines::throw_delayed_StackOverflowError_entry());
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(t0, target, offset);
jalr(x0, t0, offset);
});
far_jump(target);
should_not_reach_here();

bind(no_reserved_zone_enabling);
Expand Down Expand Up @@ -3297,21 +3274,19 @@ address MacroAssembler::trampoline_call(Address entry) {
address target = entry.target();

// We need a trampoline if branches are far.
if (far_branches()) {
if (!in_scratch_emit_size()) {
if (entry.rspec().type() == relocInfo::runtime_call_type) {
assert(CodeBuffer::supports_shared_stubs(), "must support shared stubs");
code()->share_trampoline_for(entry.target(), offset());
} else {
address stub = emit_trampoline_stub(offset(), target);
if (stub == nullptr) {
postcond(pc() == badAddress);
return nullptr; // CodeCache is full
}
if (!in_scratch_emit_size()) {
if (entry.rspec().type() == relocInfo::runtime_call_type) {
assert(CodeBuffer::supports_shared_stubs(), "must support shared stubs");
code()->share_trampoline_for(entry.target(), offset());
} else {
address stub = emit_trampoline_stub(offset(), target);
if (stub == nullptr) {
postcond(pc() == badAddress);
return nullptr; // CodeCache is full
}
}
target = pc();
}
target = pc();

address call_pc = pc();
#ifdef ASSERT
Expand Down Expand Up @@ -3459,7 +3434,7 @@ void MacroAssembler::cmpptr(Register src1, Address src2, Label& equal) {
assert_different_registers(src1, t0);
relocate(src2.rspec(), [&] {
int32_t offset;
la_patchable(t0, src2, offset);
auipc(t0, src2, offset);
ld(t0, Address(t0, offset));
});
beq(src1, t0, equal);
Expand Down Expand Up @@ -4688,7 +4663,7 @@ void MacroAssembler::rt_call(address dest, Register tmp) {
} else {
relocate(target.rspec(), [&] {
int32_t offset;
la_patchable(tmp, target, offset);
movptr(tmp, target, offset);
jalr(x1, tmp, offset);
});
}
Expand Down
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