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fix riscv code
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feilongjiang authored Oct 19, 2023
1 parent c7b53e7 commit f408667
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions src/hotspot/cpu/riscv/downcallLinker_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,7 @@ void DowncallLinker::StubGenerator::pd_add_offset_to_oop(VMStorage reg_oop, VMSt
}
}

void DowncallStubGenerator::generate() {
void DowncallLinker::StubGenerator::generate() {
enum layout {
fp_off,
fp_off2,
Expand All @@ -122,8 +122,8 @@ void DowncallStubGenerator::generate() {
GrowableArray<VMStorage> java_regs;
ForeignGlobals::java_calling_convention(_signature, _num_args, java_regs);
bool has_objects = false;
GrowableArray<VMStorage> filtered_java_regs = ForeignGlobals::downcall_filter_offset_regs(java_regsm, _signature,
_num_regs, has_objects);
GrowableArray<VMStorage> filtered_java_regs = ForeignGlobals::downcall_filter_offset_regs(java_regs, _signature,
_num_args, has_objects);
assert(!(_needs_transition && has_objects), "can not pass objects when doing transition");

int allocated_frame_size = 0;
Expand Down Expand Up @@ -212,7 +212,7 @@ void DowncallStubGenerator::generate() {
}

if (has_objects) {
add_offset_to_oops(java_regs, as_VMStorage(t0), as_VMStorage(t1));
add_offsets_to_oops(java_regs, as_VMStorage(t0), as_VMStorage(t1));
}

__ block_comment("{ argument shuffle");
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