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fix Memory.wr16(), fix KC85 KCTAP loading
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floooh committed Aug 9, 2024
1 parent c5da083 commit 523e174
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Showing 2 changed files with 10 additions and 10 deletions.
4 changes: 2 additions & 2 deletions src/common/memory.zig
Original file line number Diff line number Diff line change
Expand Up @@ -78,8 +78,8 @@ pub fn Type(comptime cfg: TypeConfig) type {

// write 16-bit value to memory
pub inline fn wr16(self: *Self, addr: u16, data: u16) void {
self.wr(addr, @truncate(data >> 8));
self.wr(addr +% 1, @truncate(data));
self.wr(addr, @truncate(data));
self.wr(addr +% 1, @truncate(data >> 8));
}

/// map address range as RAM to host memory
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16 changes: 8 additions & 8 deletions src/systems/kc85.zig
Original file line number Diff line number Diff line change
Expand Up @@ -1009,10 +1009,11 @@ pub fn Type(comptime model: Model) type {
while (addr < end_addr) {
// each block is 1 lead byte + 128 bytes data
pos += 1;
for (pos..pos + 128) |i| {
for (0..128) |_| {
if (addr < end_addr) {
self.mem.wr(addr, opts.data[i]);
self.mem.wr(addr, opts.data[pos]);
addr +%= 1;
pos += 1;
}
}
}
Expand Down Expand Up @@ -1056,22 +1057,21 @@ pub fn Type(comptime model: Model) type {
fn loadStart(self: *Self, exec_addr: u16) void {
self.cpu.r[Z80.A] = 0;
self.cpu.r[Z80.F] = 0x10;
self.cpu.af2 = 0;
self.cpu.setBC(0);
self.cpu.bc2 = 0;
self.cpu.setDE(0);
self.cpu.de2 = 0;
self.cpu.setHL(0);
self.cpu.hl2 = 0;
self.cpu.setSP(0x01C2);
self.cpu.af2 = 0;
self.cpu.bc2 = 0;
self.cpu.de2 = 0;
self.cpu.hl2 = 0;
// delete ASCII buffer
for (0xB200..0xB700) |addr| {
self.mem.wr(@truncate(addr), 0);
}
self.mem.wr(0xB7A0, 0);
// FIXME: do we actually need to reset PIO-B and memory mapping here?
// write return address
self.mem.wr16(self.cpu.SP(), exec_addr);
self.mem.wr16(self.cpu.SP(), loadReturnAddr());
// start execution at new address
self.cpu.prefetch(exec_addr);
}
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