axs103 v1.1: Prepare for release

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

board/synopsys/axs10x/patches/u-boot/0001-axs103-Clean-up-smp_kick_all_cpus.patch

@@ -0,0 +1,47 @@
+From ee5a5a51780bcb17e5240335ddfa9c98a0e6f890 Mon Sep 17 00:00:00 2001
+From: Alexey Brodkin <abrodkin@synopsys.com>
+Date: Thu, 30 Mar 2017 19:18:30 +0300
+Subject: [PATCH 1/2] axs103: Clean-up smp_kick_all_cpus()
+
+ * Rely on default pulse polarity value
+ * Don't mess with "multicore" value as it doesn't affect execution
+
+In essence we now do a bare minimal stuff:
+ 1) Select HS38x2_1 with CORE_SEL=1 bits
+ 2) Select "manual" core start (via CREG) with START_MODE=0
+ 3) Generate cpu_start pulse with START=1
+
+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
+---
+ board/synopsys/axs10x/axs10x.c | 12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
+
+diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
+index a5e774b2cf7b..57c790220f71 100644
+--- a/board/synopsys/axs10x/axs10x.c
++++ b/board/synopsys/axs10x/axs10x.c
+@@ -61,16 +61,14 @@ void smp_kick_all_cpus(void)
+ {
+ /* CPU start CREG */
+ #define AXC003_CREG_CPU_START 0xF0001400
+-
+ /* Bits positions in CPU start CREG */
+ #define BITS_START 0
+-#define BITS_POLARITY 8
++#define BITS_START_MODE 4
+ #define BITS_CORE_SEL 9
+-#define BITS_MULTICORE 12
+-
+-#define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \
+- (1 << BITS_POLARITY) | (1 << BITS_START)
+
+- writel(CMD, (void __iomem *)AXC003_CREG_CPU_START);
++ int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
++ cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
++ cmd &= ~(1 << BITS_START_MODE);
++ writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
+ }
+ #endif
+-- 
+2.7.4
+

board/synopsys/axs10x/patches/u-boot/0002-axs103-Support-slave-core-kick-start-on-axs103-v1.1-.patch

@@ -0,0 +1,71 @@
+From a5fa3b17cb10ce020f8b7fe6a26c45d75f55b481 Mon Sep 17 00:00:00 2001
+From: Alexey Brodkin <abrodkin@synopsys.com>
+Date: Fri, 31 Mar 2017 11:14:35 +0300
+Subject: [PATCH 2/2] axs103: Support slave core kick-start on axs103 v1.1
+ firmware
+
+In axs103 v1.1 procedure to kick-start slave cores has changed quite a bit
+compared t previous implementation.
+
+In particular:
+ * We used to have a generic START bit for all cores selected by CORE_SEL
+ mask. But now we don't touch CORE_SEL at all because we have a dedicated
+ START bit for each core:
+ bit 0: Core 0 (master)
+ bit 1: Core 1 (slave)
+ * Now there's no need to select "manual" mode of core start
+
+Additional challenge for us is how to tell which axs103 firmware we're
+dealing with. For now we'll rely on ARC core version which was bumped
+from 2.1c to 3.0.
+
+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
+---
+ board/synopsys/axs10x/axs10x.c | 23 +++++++++++++++++++++--
+ 1 file changed, 21 insertions(+), 2 deletions(-)
+
+diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
+index 57c790220f71..e6b69da3da7f 100644
+--- a/board/synopsys/axs10x/axs10x.c
++++ b/board/synopsys/axs10x/axs10x.c
+@@ -7,6 +7,7 @@
+ #include <common.h>
+ #include <dwmmc.h>
+ #include <malloc.h>
++#include <asm/arcregs.h>
+ #include "axs10x.h"
+
+ DECLARE_GLOBAL_DATA_PTR;
+@@ -66,9 +67,27 @@ void smp_kick_all_cpus(void)
+ #define BITS_START_MODE 4
+ #define BITS_CORE_SEL 9
+
++/*
++ * In axs103 v1.1 START bits semantics has changed quite a bit.
++ * We used to have a generic START bit for all cores selected by CORE_SEL mask.
++ * But now we don't touch CORE_SEL at all because we have a dedicated START bit
++ * for each core:
++ * bit 0: Core 0 (master)
++ * bit 1: Core 1 (slave)
++ */
++#define BITS_START_CORE1 1
++
++#define ARCVER_HS38_3_0 0x53
++
++ int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
+ int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
+- cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
+- cmd &= ~(1 << BITS_START_MODE);
++
++ if (core_family < ARCVER_HS38_3_0) {
++ cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
++ cmd &= ~(1 << BITS_START_MODE);
++ } else {
++ cmd |= (1 << BITS_START_CORE1);
++ }
+ writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
+ }
+ #endif
+-- 
+2.7.4
+

configs/snps_axs103_defconfig

@@ -9,19 +9,36 @@ BR2_TARGET_ROOTFS_INITRAMFS=y
 BR2_SYSTEM_DHCP="eth0"
 BR2_ROOTFS_OVERLAY="board/synopsys/axs10x/fs-overlay"
 
-# Linux headers same as kernel, a 4.9 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y
+# Linux headers not the same as kernel, a 4.9 series
+BR2_KERNEL_HEADERS_4_9=y
 
 # Kernel
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.6"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.10.9"
 BR2_LINUX_KERNEL_DEFCONFIG="axs103_smp"
 
 # Bootloader
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2016.11"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2017.01"
+BR2_TARGET_UBOOT_PATCH="board/synopsys/axs10x/patches/u-boot"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="axs103"
 BR2_TARGET_UBOOT_NEEDS_DTC=y
+BR2_TARGET_UBOOT_FORMAT_ELF=y
+
+# Extra toolchain options for Synopsys release
+BR2_TOOLCHAIN_BUILDROOT_WCHAR=y
+BR2_PTHREAD_DEBUG=y
+
+# Applications for Synopsys release
+BR2_PACKAGE_FB_TEST_APP=y
+BR2_PACKAGE_GDB=y
+BR2_PACKAGE_GDB_SERVER=y
+BR2_PACKAGE_GDB_DEBUGGER=y
+BR2_PACKAGE_IPERF3=y
+BR2_PACKAGE_MPLAYER=y
+BR2_PACKAGE_OPENSSH=y
+BR2_PACKAGE_RSYNC=y
+BR2_PACKAGE_RT_TESTS=y