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arc: axs10x - bump u-boot to 2016.03 release
Updating u-boot version to one of the latest stable versions. Add u-boot patch to fix verifying checksum problem with the latest bit-file: [U-Boot] arc/cache: really do flush_dcache_all() even if IOC exists, u-boot patch which adds virt_to_phys() stub for ARC: [U-Boot] arc: Add virt_to_phys() stub, u-boot patch which disables IOC in U-Boot: [PATCH] arc/cache: Disable IOC Signed-off-by: Lada Trimasova <ltrimas@synopsys.com>
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Lada Trimasova
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Apr 25, 2016
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From patchwork Fri Apr 8 17:00:07 2016 | ||
Content-Type: text/plain; charset="utf-8" | ||
MIME-Version: 1.0 | ||
Content-Transfer-Encoding: 7bit | ||
Subject: [U-Boot] arc: Add virt_to_phys() stub | ||
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com> | ||
X-Patchwork-Id: 608123 | ||
Message-Id: <1460134807-16503-1-git-send-email-abrodkin@synopsys.com> | ||
To: u-boot@lists.denx.de | ||
Cc: Marek Vasut <marex@denx.de>, Alexey Brodkin <Alexey.Brodkin@synopsys.com> | ||
Date: Fri, 8 Apr 2016 10:00:07 -0700 | ||
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Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping" | ||
introduced usage of virt_to_phys() in ehci-hcd. | ||
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Since there was no implementation of virt_to_phys() for ARC | ||
compilation of the ehci-generic driver failed. | ||
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This change adds virt_to_phys() stub for ARC so now | ||
USB driver for AXS101 board could be built again. | ||
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Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> | ||
Cc: Marek Vasut <marex@denx.de> | ||
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | ||
Cc: Hans de Goede <hdegoede@redhat.com> | ||
Acked-by: Marek Vasut <marex@denx.de> | ||
--- | ||
arch/arc/include/asm/io.h | 5 +++++ | ||
1 file changed, 5 insertions(+) | ||
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diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h | ||
index 281682c..b6f7724 100644 | ||
--- a/arch/arc/include/asm/io.h | ||
+++ b/arch/arc/include/asm/io.h | ||
@@ -239,4 +239,9 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen) | ||
#define setbits_8(addr, set) setbits(8, addr, set) | ||
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) | ||
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+static inline phys_addr_t virt_to_phys(void *vaddr) | ||
+{ | ||
+ return (phys_addr_t)((unsigned long)vaddr); | ||
+} | ||
+ | ||
#endif /* __ASM_ARC_IO_H */ |
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From 9a6dd15b56b5bb005290d0e4f51e76d384b6c1e6 Mon Sep 17 00:00:00 2001 | ||
From: Alexey Brodkin <abrodkin@synopsys.com> | ||
Date: Mon, 25 Apr 2016 13:21:01 +0300 | ||
Subject: [PATCH] arc/cache: Disable IOC | ||
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As of today there's no way in U-Boot to distinguish | ||
cache operations on data being DMAed to or from memory | ||
and all those CPUs do them selves on memory. | ||
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If IOC block was detected we disabled all cache operations | ||
and that was completely fine for data being transferred | ||
by means of DMA simply because IOC did its work and | ||
made sure data is coherent. | ||
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But except DMA that changes memory in U-Boot | ||
we sometimes need to alter memory contents as well. | ||
And it applies not only to data but to instructions as well. | ||
These are 2 very good examples: | ||
1) U-Boot's self relocation | ||
2) Kick-start of slave cores in SMP systems | ||
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In both above cases we modify code and if instructions | ||
caches of CPUs won't be updated until that new code gets | ||
pushed out of data cache of the core which made modification | ||
to either SLC or in external memory (if there's no SLC). | ||
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So until there's a good and clean solution on cache management for | ||
2 separate cases (DMA and instructions) we'll disable IOC in U-Boot. | ||
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Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> | ||
--- | ||
arch/arc/lib/cache.c | 3 ++- | ||
1 file changed, 2 insertions(+), 1 deletion(-) | ||
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diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c | ||
index d1fb661..b52d7be 100644 | ||
--- a/arch/arc/lib/cache.c | ||
+++ b/arch/arc/lib/cache.c | ||
@@ -148,7 +148,7 @@ static void read_decode_cache_bcr_arcv2(void) | ||
slc_exists = 1; | ||
slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64; | ||
} | ||
- | ||
+#if 0 /* Disable IOC due to inability to distinguish ops on DMA data and not */ | ||
union { | ||
struct bcr_clust_cfg { | ||
#ifdef CONFIG_CPU_BIG_ENDIAN | ||
@@ -163,6 +163,7 @@ static void read_decode_cache_bcr_arcv2(void) | ||
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); | ||
if (cbcr.fields.c) | ||
ioc_exists = 1; | ||
+#endif | ||
} | ||
#endif | ||
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-- | ||
2.5.0 | ||
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45 changes: 45 additions & 0 deletions
45
boot/uboot/U-Boot-arc-cache-really-do-flush_dcache_all-even-if-IOC-exists.patch
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From patchwork Mon Apr 18 10:28:39 2016 | ||
Content-Type: text/plain; charset="utf-8" | ||
MIME-Version: 1.0 | ||
Content-Transfer-Encoding: 7bit | ||
Subject: [U-Boot] arc/cache: really do flush_dcache_all() even if IOC exists | ||
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com> | ||
X-Patchwork-Id: 611647 | ||
Message-Id: <1460975319-6187-1-git-send-email-abrodkin@synopsys.com> | ||
To: u-boot@lists.denx.de | ||
Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com> | ||
Date: Mon, 18 Apr 2016 13:28:39 +0300 | ||
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flush_dcache_all() is used in the very end of U-Boot self relocation | ||
to write back all copied and then patched code and data to their | ||
new location in the very end of available memory space. | ||
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Since that has nothing to do with IO (i.e. no external DMA happens | ||
here) IOC won't help here and we need to write back data cache contents | ||
manually. | ||
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Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> | ||
--- | ||
arch/arc/lib/cache.c | 7 ++----- | ||
1 file changed, 2 insertions(+), 5 deletions(-) | ||
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diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c | ||
index 56988dd..d1fb661 100644 | ||
--- a/arch/arc/lib/cache.c | ||
+++ b/arch/arc/lib/cache.c | ||
@@ -430,13 +430,10 @@ void invalidate_dcache_all(void) | ||
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void flush_dcache_all(void) | ||
{ | ||
-#ifdef CONFIG_ISA_ARCV2 | ||
- if (!ioc_exists) | ||
-#endif | ||
- __dc_entire_op(OP_FLUSH); | ||
+ __dc_entire_op(OP_FLUSH); | ||
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#ifdef CONFIG_ISA_ARCV2 | ||
- if (slc_exists && !ioc_exists) | ||
+ if (slc_exists) | ||
__slc_entire_op(OP_FLUSH); | ||
#endif | ||
} |
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