-
Notifications
You must be signed in to change notification settings - Fork 173
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Fix compilation for 32-bit Arm platforms
The existing Neon code makes use of some intrinsics which are only available on AArch64, so adjust these implementations to also work on Armv7 platforms. Also introduce a new REAL_TARGET_AARCH64 macro to distinguish between 32-bit and 64-bit in new and existing Arm code. Since these implementations require that Neon is available, also add -mfpu=neon to the compile line for these files. This necessitates removing the SIMD implementation files from LTO in the same way that is already done for the x86 kernels.
- Loading branch information
1 parent
3f2dcf4
commit 45b8121
Showing
5 changed files
with
176 additions
and
80 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,88 @@ | ||
| /* ----------------------------------------------------------------------------- | ||
| The copyright in this software is being made available under the Clear BSD | ||
| License, included below. No patent rights, trademark rights and/or | ||
| other Intellectual Property Rights other than the copyrights concerning | ||
| the Software are granted under this license. | ||
| The Clear BSD License | ||
| Copyright (c) 2019-2024, Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. & The VVenC Authors. | ||
| All rights reserved. | ||
| Redistribution and use in source and binary forms, with or without modification, | ||
| are permitted (subject to the limitations in the disclaimer below) provided that | ||
| the following conditions are met: | ||
| * Redistributions of source code must retain the above copyright notice, | ||
| this list of conditions and the following disclaimer. | ||
| * Redistributions in binary form must reproduce the above copyright | ||
| notice, this list of conditions and the following disclaimer in the | ||
| documentation and/or other materials provided with the distribution. | ||
| * Neither the name of the copyright holder nor the names of its | ||
| contributors may be used to endorse or promote products derived from this | ||
| software without specific prior written permission. | ||
| NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY | ||
| THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
| CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
| LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | ||
| PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR | ||
| CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | ||
| EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | ||
| PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | ||
| BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER | ||
| IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||
| ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
| POSSIBILITY OF SUCH DAMAGE. | ||
| ------------------------------------------------------------------------------------------- */ | ||
|
|
||
| /** \file sum_neon.h | ||
| \brief Helper functions for adding across vectors | ||
| */ | ||
|
|
||
| #pragma once | ||
|
|
||
| #include "CommonDef.h" | ||
|
|
||
| #if defined( TARGET_SIMD_ARM ) | ||
|
|
||
| #include <arm_neon.h> | ||
|
|
||
| namespace vvenc | ||
| { | ||
|
|
||
| static inline int horizontal_add_s32x4( const int32x4_t a ) | ||
| { | ||
| #if REAL_TARGET_AARCH64 | ||
| return vaddvq_s32( a ); | ||
| #else | ||
| const int64x2_t b = vpaddlq_s32( a ); | ||
| const int32x2_t c = vadd_s32( vreinterpret_s32_s64( vget_low_s64( b ) ), vreinterpret_s32_s64( vget_high_s64( b ) ) ); | ||
| return vget_lane_s32( c, 0 ); | ||
| #endif | ||
| } | ||
|
|
||
| static inline int32x4_t horizontal_add_4d_s32x4( const int32x4_t v0, const int32x4_t v1, const int32x4_t v2, | ||
| const int32x4_t v3 ) | ||
| { | ||
| #if REAL_TARGET_AARCH64 | ||
| int32x4_t v01 = vpaddq_s32( v0, v1 ); | ||
| int32x4_t v23 = vpaddq_s32( v2, v3 ); | ||
| return vpaddq_s32( v01, v23 ); | ||
| #else | ||
| int32x4_t res = vdupq_n_s32( 0 ); | ||
| res = vsetq_lane_s32( horizontal_add_s32x4( v0 ), res, 0 ); | ||
| res = vsetq_lane_s32( horizontal_add_s32x4( v1 ), res, 1 ); | ||
| res = vsetq_lane_s32( horizontal_add_s32x4( v2 ), res, 2 ); | ||
| res = vsetq_lane_s32( horizontal_add_s32x4( v3 ), res, 3 ); | ||
| return res; | ||
| #endif | ||
| } | ||
|
|
||
| } // namespace vvenc | ||
|
|
||
| #endif |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters