Skip to content

Commit

Permalink
more rework
Browse files Browse the repository at this point in the history
  • Loading branch information
xorpse committed Jun 11, 2024
1 parent 8dcbc41 commit 924f4cf
Show file tree
Hide file tree
Showing 5 changed files with 75 additions and 60 deletions.
12 changes: 6 additions & 6 deletions fugue-core/src/arch/aarch64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ impl AArch64InsnLifter {
Self { decoder }
}

pub fn boxed<'a>(self) -> Box<dyn InsnLifter<'a>> {
pub fn boxed(self) -> Box<dyn InsnLifter> {
Box::new(self)
}
}
Expand All @@ -39,14 +39,14 @@ fn should_lift(insn: &AArch64Instruction) -> bool {
}
}

impl<'a> InsnLifter<'a> for AArch64InsnLifter {
fn properties<'b>(
impl InsnLifter for AArch64InsnLifter {
fn properties<'input, 'lifter>(
&mut self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
irb: &'lifter IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError> {
bytes: &'input [u8],
) -> Result<LiftedInsn<'input, 'lifter>, LifterError> {
let mut reader = yaxpeax_arch::U8Reader::new(bytes);
let insn = self
.decoder
Expand Down
12 changes: 6 additions & 6 deletions fugue-core/src/arch/arm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ impl ARMInsnLifter {
Self { decoder }
}

pub fn boxed<'a>(self) -> Box<dyn InsnLifter<'a>> {
pub fn boxed(self) -> Box<dyn InsnLifter> {
Box::new(self)
}
}
Expand All @@ -47,14 +47,14 @@ fn should_lift(insn: &ARMInstruction) -> bool {
}
}

impl<'a> InsnLifter<'a> for ARMInsnLifter {
fn properties<'b>(
impl InsnLifter for ARMInsnLifter {
fn properties<'input, 'lifter>(
&mut self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
irb: &'lifter IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError> {
bytes: &'input [u8],
) -> Result<LiftedInsn<'input, 'lifter>, LifterError> {
let mut reader = yaxpeax_arch::U8Reader::new(bytes);
let insn = self
.decoder
Expand Down
26 changes: 15 additions & 11 deletions fugue-core/src/arch/x86.rs
Original file line number Diff line number Diff line change
Expand Up @@ -103,17 +103,21 @@ where
Self::new_with(D::Decoder::default())
}

pub fn new_with(decoder: D::Decoder) -> Self {
Self { decoder }
}
}

impl X86InsnLifter<x86_32> {
pub fn new_32() -> X86InsnLifter<x86_32> {
X86InsnLifter::new_with(X86_32InstDecoder::default())
}
}

impl X86InsnLifter<x86_64> {
pub fn new_64() -> X86InsnLifter<x86_64> {
X86InsnLifter::new_with(X86_64InstDecoder::default())
}

pub fn new_with(decoder: D::Decoder) -> Self {
Self { decoder }
}
}

impl<D> X86InsnLifter<D>
Expand All @@ -124,26 +128,26 @@ where
<<D::Address as AddressBase>::Diff as TryInto<u8>>::Error:
std::error::Error + Send + Sync + 'static,
{
pub fn boxed<'a>(self) -> Box<dyn InsnLifter<'a>> {
pub fn boxed(self) -> Box<dyn InsnLifter> {
Box::new(self)
}
}

impl<'a, D> InsnLifter<'a> for X86InsnLifter<D>
impl<D> InsnLifter for X86InsnLifter<D>
where
D: X86Arch,
for<'b> U8Reader<'b>: Reader<D::Address, D::Word>,
for<'input> U8Reader<'input>: Reader<D::Address, D::Word>,
<D::Address as AddressBase>::Diff: TryInto<u8>,
<<D::Address as AddressBase>::Diff as TryInto<u8>>::Error:
std::error::Error + Send + Sync + 'static,
{
fn properties<'b>(
fn properties<'input, 'lifter>(
&mut self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
irb: &'lifter IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError> {
bytes: &'input [u8],
) -> Result<LiftedInsn<'input, 'lifter>, LifterError> {
let mut reader = yaxpeax_arch::U8Reader::new(bytes);

let insn = self
Expand Down
21 changes: 6 additions & 15 deletions fugue-core/src/icfg/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,10 +40,7 @@ mod test {
use fugue_ir::Address;

use yaxpeax_arch::*;

use yaxpeax_arm::armv7::DecodeError as ARMDecoderError;
use yaxpeax_arm::armv7::InstDecoder as ARMInstDecoder;
use yaxpeax_arm::armv7::Instruction as ARMInstruction;

use crate::language::LanguageBuilder;
use crate::lifter::*;
Expand Down Expand Up @@ -76,18 +73,16 @@ mod test {
}
}

impl<'a> InsnLifter<'a, ARMInstruction> for ARMInsnLifter {
type Error = ARMDecoderError;

fn properties<'b>(
impl InsnLifter for ARMInsnLifter {
fn properties<'a, 'b>(
&mut self,
_lifter: &mut Lifter,
_irb: &'a IRBuilderArena,
_irb: &'b IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b, ARMInstruction>, Self::Error> {
bytes: &'a [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError> {
let mut reader = yaxpeax_arch::U8Reader::new(bytes);
let insn = self.0.decode(&mut reader)?;
let insn = self.0.decode(&mut reader).map_err(LifterError::decode)?;
let size = insn.len().to_const() as u8;

Ok(LiftedInsn {
Expand All @@ -97,7 +92,6 @@ mod test {
operations: RefCell::new(None),
delay_slots: 0,
length: size,
data: insn,
})
}
}
Expand All @@ -107,9 +101,6 @@ mod test {
while off < memory.len() {
let lifted = plifter.properties(&mut lifter, &irb, address + off, &memory[off..])?;

println!("--- insn @ {} ---", lifted.address());
println!("{}", lifted.data());

println!("--- pcode @ {} ---", lifted.address());
for (i, op) in lifted.pcode(&mut lifter, &irb)?.iter().enumerate() {
println!("{i:02} {}", op.display(language.translator()));
Expand Down
64 changes: 42 additions & 22 deletions fugue-core/src/lifter.rs
Original file line number Diff line number Diff line change
@@ -1,15 +1,17 @@
use std::cell::{Cell, Ref, RefCell};

use fugue_ir::disassembly::lift::ArenaVec;
use fugue_ir::disassembly::PCodeRaw;
use fugue_ir::disassembly::{ContextDatabase, IRBuilderArena, PCodeData};
use fugue_ir::disassembly::{ContextDatabase, IRBuilderArena, PCodeData, PCodeRaw};
use fugue_ir::error::Error;
use fugue_ir::il::instruction::Instruction;
use fugue_ir::translator::TranslationContext;
use fugue_ir::{Address, Translator};

use thiserror::Error;

use crate::arch::aarch64::AArch64InsnLifter;
use crate::arch::arm::ARMInsnLifter;
use crate::arch::x86::X86InsnLifter;
use crate::ir::{Insn, PCode};

#[derive(Debug, Error)]
Expand Down Expand Up @@ -117,6 +119,18 @@ impl<'a> Lifter<'a> {
})
}

pub fn lifter_for_arch(&self) -> Box<dyn InsnLifter> {
let arch = self.translator().architecture();

match (arch.processor(), arch.bits()) {
("AARCH64", 64) => AArch64InsnLifter::new().boxed(),
("ARM", 32) => ARMInsnLifter::new().boxed(),
("x86", 64) => X86InsnLifter::new_64().boxed(),
("x86", 32) => X86InsnLifter::new_32().boxed(),
_ => DefaultInsnLifter::new().boxed(),
}
}

pub fn translator(&self) -> &Translator {
self.0.translator()
}
Expand Down Expand Up @@ -177,16 +191,16 @@ bitflags::bitflags! {
}
}

pub struct LiftedInsn<'a, 'b> {
pub struct LiftedInsn<'input, 'lifter> {
pub address: Address,
pub bytes: &'b [u8],
pub bytes: &'input [u8],
pub properties: Cell<LiftedInsnProperties>,
pub operations: RefCell<Option<ArenaVec<'a, PCodeData<'a>>>>,
pub operations: RefCell<Option<ArenaVec<'lifter, PCodeData<'lifter>>>>,
pub delay_slots: u8,
pub length: u8,
}

impl<'a, 'b> LiftedInsn<'a, 'b> {
impl<'input, 'lifter> LiftedInsn<'input, 'lifter> {
pub fn address(&self) -> Address {
self.address
}
Expand All @@ -206,8 +220,8 @@ impl<'a, 'b> LiftedInsn<'a, 'b> {
pub fn pcode(
&self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
) -> Result<Ref<ArenaVec<'a, PCodeData<'a>>>, Error> {
irb: &'lifter IRBuilderArena,
) -> Result<Ref<ArenaVec<'lifter, PCodeData<'lifter>>>, Error> {
if let Some(operations) = self.try_pcode() {
return Ok(operations);
}
Expand All @@ -218,15 +232,15 @@ impl<'a, 'b> LiftedInsn<'a, 'b> {
self.pcode(lifter, irb)
}

pub fn try_pcode(&self) -> Option<Ref<ArenaVec<'a, PCodeData<'a>>>> {
pub fn try_pcode(&self) -> Option<Ref<ArenaVec<'lifter, PCodeData<'lifter>>>> {
Ref::filter_map(self.operations.borrow(), |v| v.as_ref()).ok()
}

pub fn into_pcode(
self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
) -> Result<PCode<'a>, Error> {
irb: &'lifter IRBuilderArena,
) -> Result<PCode<'lifter>, Error> {
if let Some(operations) = self.operations.into_inner() {
return Ok(PCode {
address: self.address,
Expand All @@ -240,14 +254,14 @@ impl<'a, 'b> LiftedInsn<'a, 'b> {
}
}

pub trait InsnLifter<'a> {
fn properties<'b>(
pub trait InsnLifter {
fn properties<'input, 'lifter>(
&mut self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
irb: &'lifter IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError>;
bytes: &'input [u8],
) -> Result<LiftedInsn<'input, 'lifter>, LifterError>;
}

#[derive(Debug, Clone, Copy, Default)]
Expand All @@ -257,22 +271,28 @@ impl DefaultInsnLifter {
pub fn new() -> Self {
Self::default()
}

pub fn boxed(self) -> Box<dyn InsnLifter> {
Box::new(self)
}
}

impl<'a> InsnLifter<'a> for DefaultInsnLifter {
fn properties<'b>(
impl InsnLifter for DefaultInsnLifter {
fn properties<'input, 'lifter>(
&mut self,
lifter: &mut Lifter,
irb: &'a IRBuilderArena,
irb: &'lifter IRBuilderArena,
address: Address,
bytes: &'b [u8],
) -> Result<LiftedInsn<'a, 'b>, LifterError> {
bytes: &'input [u8],
) -> Result<LiftedInsn<'input, 'lifter>, LifterError> {
let PCode {
address,
operations,
delay_slots,
length,
} = lifter.lift(irb, address, bytes).map_err(LifterError::lift)?;
} = lifter
.lift(irb, address, bytes)
.map_err(LifterError::lift)?;

Ok(LiftedInsn {
address,
Expand Down

0 comments on commit 924f4cf

Please sign in to comment.