initial esp support

[kaspar030]

This PR adds initial esp32 support.

Currently, this adds support for a random esp32c3 (RISC-V based) board, the necessary infra for esp-hal, and esp-wifi.

There's no preemptive scheduling (riot-rs-threads) yet.
A single thread-mode executor is used.

edit

I'm testing with:

CONFIG_WIFI_NETWORK="your-ssid" CONFIG_WIFI_PASSWORD="your-pwd" laze build -Cexamples/embassy-http-server -b ai-c3 -s debug-console -d silent-panic run

This implies connecting to wifi but using the hard-coded IP address. to make the esp use dhcp, remove the "override-network-config" from examples/embassy-http-server/Cargo.toml.

Ah, it needs some toolchain support.
At least laze b install-toolchain and cargo install espflash.

[ROMemories]

Cool stuff! I think a few things could be factored in the wifi module

[kaspar030]

@ROMemories I think I got most of your review comments. (sorry for already squashing, I had trouble absorbing the fixes into the right commits)

[elenaf9]

How is exception/ interrupt handling implementing in esp-hal?

I have only started looking into this, but it might be that this PR will conflict with a riscv implementation in riot-rs-threading.

Interrupts/ traps in RISC-V are handled by writing the address of the trap entry function into a CSR (mtvec).
From what I understand/ read so far, I think esp-hal and riscv-rt (used in riot-rs-threading) both setup the mtvec register with their own trap handling logic ^{1 2}, which could cause problems when both are enabled.
Have you looked into this? I believe esp-hal offers some API for implementing a custom interrupt handler ³, which might help resolving this conflict, but I don't know how that would impact the rest of its functionality.

Footnotes

1. https://github.com/esp-rs/esp-hal/blob/85ee3807085ceff0e4e03b5ad053baebd7c8c109/esp-riscv-rt/src/lib.rs#L251C5-L251C11 ↩

2. https://github.com/rust-embedded/riscv/blob/555441cbcd4c4d3dcee9185de56694a7cedec163/riscv-rt/src/asm.rs#L76-L81 ↩

3. https://github.com/esp-rs/esp-hal/blob/85ee3807085ceff0e4e03b5ad053baebd7c8c109/esp-hal/ld/esp32c3/esp32c3.x#L20-L22 ↩