Merge branch 'template'

readme.md

@@ -19,4 +19,4 @@
 | Part 5 | IR designs (ANF, CPS, KNF)                              | [lec5](./course/lecture5-intermediate-representation/lec5.pdf)  | [课时六](https://www.bilibili.com/video/BV1txxjenEXs/) | [lec5.mbt](./course/lecture5-intermediate-representation/lec5.mbt)
 | Part 6 | Closure calculus                                   | [lec6](./course/lecture6-closure/lec6.pdf)       | [课时七](https://www.bilibili.com/video/BV1FysdemEZv/)      |
 | Part 7 | Register allocation           |[lec7](./course/lecture7-regalloc/lec7.pdf) | [课时八](https://www.bilibili.com/video/BV1GxsZeBENm/)      |              |                     |
-| Part 8 | Garbage collection           |        |       |              |                     |
+| Part 8 | Garbage collection           |        | [课时九（上）](https://www.bilibili.com/video/BV1G5xxeSECT)、[课时九（下）](https://www.bilibili.com/video/BV1urxseVEwa/)      |              |                     |

src/riscv/rv_asm.mbt

@@ -63,8 +63,8 @@ pub enum RvAsm {
   FdivD(FReg, FReg, FReg)
   Fld(FReg, MemAccess[Reg, Int])
   Fsd(FReg, MemAccess[Reg, Int])
-  FbeqD(FReg, FReg, Label)
-  FbleD(FReg, FReg, Label)
+  FeqD(Reg, FReg, FReg)
+  FleD(Reg, FReg, FReg)
   FmvDX(FReg, Reg)
   // pseudo instructions
   Nop
@@ -85,12 +85,12 @@ pub enum RvAsm {
   Comment(String)
 }
 
-fn write3[TReg : Show](
+fn write3[TReg1 : Show, TReg2 : Show, TReg3 : Show](
   logger : Logger,
   op : String,
-  rd : TReg,
-  rs1 : TReg,
-  rs2 : TReg
+  rd : TReg1,
+  rs1 : TReg2,
+  rs2 : TReg3
 ) -> Unit {
   logger.write_string(op)
   logger.write_string(" ")
@@ -224,8 +224,8 @@ impl Show for RvAsm with output(self, logger) {
     FdivD(rd, rs1, rs2) => write3(logger, "fdiv.d", rd, rs1, rs2)
     Fld(rd, mem) => write2mem(logger, "fld", rd, mem)
     Fsd(rd, mem) => write2mem(logger, "fsd", rd, mem)
-    FbeqD(rs1, rs2, label) => write2label(logger, "fbeq.d", rs1, rs2, label)
-    FbleD(rs1, rs2, label) => write2label(logger, "fble.d", rs1, rs2, label)
+    FeqD(rd, rs1, rs2) => write3(logger, "feq.d", rd, rs1, rs2)
+    FleD(rd, rs1, rs2) => write3(logger, "fle.d", rd, rs1, rs2)
     FmvDX(rd, rs1) => write2(logger, "fmv.d.x", rd, rs1)
     Nop => logger.write_string("nop")
     La(rd, label) => {

test/test_src/matmul.mbt

@@ -41,9 +41,9 @@ fn main {
     let _ = init_arr(m - 1);
     mat
   };
-  let a = make_arr(2, 3);
-  let b = make_arr(3, 2);
-  let c = make_arr(2, 2);
+  let a = gen_arr(2, 3);
+  let b = gen_arr(3, 2);
+  let c = gen_arr(2, 2);
   a[0][0] = 1.0; a[0][1] = 2.0; a[0][2] = 3.0;
   a[1][0] = 4.0; a[1][1] = 5.0; a[1][2] = 6.0;
   b[0][0] = 7.0; b[0][1] = 8.0;