Adjusting Metal1 for symetrical CMOS Pcells. #83
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…ases and Makefile used for testing
…f the resistor devices.
Fixing Resistor Models to work properly for ngspice
Adding drop down menu for klayout
Fixing all resistor issues.
Adding missing Metaltop rules MT.2b and MT30.6
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@christoph-weiser It's advisable to actually open your PRs on: |
Modifying models regression
Signed-off-by: Amro Tork <74936860+atorkmabrains@users.noreply.github.com>
Signed-off-by: Amro Tork <74936860+atorkmabrains@users.noreply.github.com>
…new main definitions
modifying diode model regression
Optimizing some rules in mdn table till mdn4
Signed-off-by: Amro Tork <74936860+atorkmabrains@users.noreply.github.com>
proppy
pushed a commit
to proppy/globalfoundries-pdk-libs-gf180mcu_fd_pr
that referenced
this pull request
Feb 6, 2023
Drc regression
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@FaragElsayed2 Could you please check if we have addressed this? |
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@atorkmabrains I will check that once I get the klayout Pcells back. |
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Thanks @FaragElsayed2 |
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Any chance you could rebase against head? |
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@FaragElsayed2 Could we rebase against main? |
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@atorkmabrains Rebase what ? This branch |
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@FaragElsayed2 Yes, please. I think the Pcells has changed. |
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@QuantamHD I don't believe we can do this at our end. @christoph-weiser Could you please rebase? |
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Fixes #82
Change description
Adjusted Metal1 for the "right" side of the Pcell for both NMOS and PMOS. It appears a single statement was missing that caused both NMOS and PMOS devices to by asymmetrical.
Improvements
This bugfix is important because it is otherwise not possible to combine drain/source areas for multi finger transistors and also because Pcell generated devices should be symmetrical.
Tests
Hand selected measurements verifying the correct placement of Metal1 + DRC run using the ruleset from this repository.