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4.FAQ
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#Macsim#
MacSim has 5 different clock domains: CPU cores, GPU cores, L3 cache tiles, Interconnection, and Memory controllers.
There are 5 corresponding knob parameters.
clock_cpu
clock_gpu
clock_l3
clock_noc
clock_mc
The value can be integer or float (in GHz). All float numbers will be rounded to one decimal place. Therefore, 1.443 GHz will be treated as 1.4 GHz.
- If you are running CPU-only or GPU-only simulations, please set clock_cpu and clock_gpu to same values
#SST
##MemHierarchy
Q) where the memory latency is measured?
MESICoherenceController.cc::printStatsForMacSim
Q) Difference between L1 cache and others? (from Hyojong)
Assumption is somewhat different. Like, L1 is supposed to have core node above; and cache or memory node below it. while non-L1 can have cache above it. By having separate code for L1 the code can be much simpler than the code for non-L1. Also, L1 is assumed to be inclusive, while non-L1 can be non-inclusive or exclusive. There are many cache parameters that can be simplified for L1 cache. And controller behavior can be made simpler for L1 than non-L1.
#Git
Some tips for using Git
Q. How to check which branches/repo that current local copy?
git remote -v
Q. Good git command summaries here