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hal::k20: Add DSPI registers #157
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This example brings up an interesting limitation of the current
Unfortunately, reads to this register fetch the values associated with the head of the FIFO. This means that queuing a new transaction would require that we first clear all of the Another solution would be mark the This does suggest, however, that the current scheme isn't quite expressive enough. Perhaps we want a new register type which has the same no-read-on-update semantics as Thoughts? |
Do I get it right that you want to write into |
The opposite actually, we don't want to preserve any of the former contents of the register across the update. |
So there is no problem with the read? Just that when you write, you don't care about the previous value. So the current implementation will look like
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Perhaps add a
Otherwise just live with the slightly verbose language above. |
@bharrisau correct.
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The other solution is a |
Conflicts: src/zinc/hal/k20/pin.rs src/zinc/hal/lpc17xx/pin.rs
@bgamari can you please update the state of this or move out from |
I'll have a look tonight. |
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