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SPI on STM32F4 + example #343
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TODO: update AltMode enum in pin.rs. |
| use volatile_cell::VolatileCell; | ||
| use core::ops::Drop; | ||
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| ioregs!(SPI = { |
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Can you please use placement ioregs ( SPI @ <address> ) in here and get rid of extern block below?
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Would this mean duplicate memory tree for each SPIx?
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Hm. Actually yes, I'll fix it.
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A refactor would surely be welcome from someone who has good understanding of STM MCUs, I'm absolutely willing to give up that tree for maintenance. |
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I reused code from stm32l1, adapted it and wrote an new example. More testing is needed.
There was also a typo (copy/paste) bug in peripheral_clock.rs.
Maybe a refactor should be done to factorize common code between stm32 mcus. Are there any plans regarding this?