Merge pull request #7 from harp-tech/update_core_1.13

Update core 1.13

Firmware/Firmware.ATXMEGA/SoundCard/SoundCard_6_2.cppproj

@@ -48,21 +48,9 @@
         <InterfaceName>PDI</InterfaceName>
       </ToolOptions>
       <ToolType>com.atmel.avrdbg.tool.atmelice</ToolType>
-      <ToolNumber>J42700022647</ToolNumber>
+      <ToolNumber>J41800031896</ToolNumber>
       <ToolName>Atmel-ICE</ToolName>
     </com_atmel_avrdbg_tool_atmelice>
-    <com_atmel_avrdbg_tool_simulator>
-      <ToolOptions xmlns="">
-        <InterfaceProperties>
-        </InterfaceProperties>
-        <InterfaceName>
-        </InterfaceName>
-      </ToolOptions>
-      <ToolType xmlns="">com.atmel.avrdbg.tool.simulator</ToolType>
-      <ToolNumber xmlns="">
-      </ToolNumber>
-      <ToolName xmlns="">Simulator</ToolName>
-    </com_atmel_avrdbg_tool_simulator>
   </PropertyGroup>
   <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
     <ToolchainSettings>
@@ -103,8 +91,6 @@
         </avrgcccpp.linker.libraries.Libraries>
         <avrgcccpp.linker.libraries.LibrarySearchPaths>
           <ListValues>
-            <Value>C:\Users\Filipe Carvalho\Documents\BitBucket\Device.LoadCells\Firmware\LoadCells</Value>
-            <Value>C:\Users\OEPS\Documents\bitbucket\fchampalimaud\Device.SoundCard\Firmware.ATXMEGA\SoundCard</Value>
           </ListValues>
         </avrgcccpp.linker.libraries.LibrarySearchPaths>
       </AvrGccCpp>
@@ -151,8 +137,6 @@
         </avrgcccpp.linker.libraries.Libraries>
         <avrgcccpp.linker.libraries.LibrarySearchPaths>
           <ListValues>
-            <Value>C:\Users\Filipe Carvalho\Documents\BitBucket\Device.LoadCells\Firmware\LoadCells</Value>
-            <Value>C:\Users\OEPS\Documents\bitbucket\fchampalimaud\Device.SoundCard\Firmware.ATXMEGA\SoundCard</Value>
           </ListValues>
         </avrgcccpp.linker.libraries.LibrarySearchPaths>
         <avrgcccpp.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcccpp.assembler.debugging.DebugLevel>

Firmware/Firmware.ATXMEGA/SoundCard/app.c

@@ -6,8 +6,6 @@
 #include "app_funcs.h"
 #include "app_ios_and_regs.h"
 #include "parallel_bus.h"
-#include "uart1.h"
-#include "bpod_cmds.h"
 
 /************************************************************************/
 /* Declare application registers                                        */
@@ -30,22 +28,25 @@ void hwbp_app_initialize(void)
 {
    /* Define versions */
    uint8_t hwH = 2;
-   uint8_t hwL = 0;
+   uint8_t hwL = 2;
    uint8_t fwH = MAJOR_FW_VERSION;
-   uint8_t fwL = 1;
+   uint8_t fwL = 2;
    uint8_t ass = 0;
 
-   /* Start core */
-   core_func_start_core(
-      1280,
-      hwH, hwL,
-      fwH, fwL,
-      ass,
-      (uint8_t*)(&app_regs),
-      APP_NBYTES_OF_REG_BANK,
-      APP_REGS_ADD_MAX - APP_REGS_ADD_MIN + 1,
-      default_device_name
-   );
+		/* Start core */
+	core_func_start_core(
+		1280,
+		hwH, hwL,
+		fwH, fwL,
+		ass,
+		(uint8_t*)(&app_regs),
+		APP_NBYTES_OF_REG_BANK,
+		APP_REGS_ADD_MAX - APP_REGS_ADD_MIN + 1,
+		default_device_name,
+		false,	// The device is _not_ able to repeat the harp timestamp clock
+		false,	// The device is _not_ able to generate the harp timestamp clock
+		0	// Default timestamp offset
+	);
 }
 
 /************************************************************************/
@@ -123,19 +124,14 @@ uint8_t temperature_read(ADC_t* adc)
 /************************************************************************/
 uint16_t AdcOffset;
 
-void core_callback_1st_config_hw_after_boot(void)
+void core_callback_define_clock_default(void) {}
+
+void core_callback_initialize_hardware(void)
 {
 	/* Initialize IOs */
 	/* Don't delete this function!!! */
 	init_ios();
 
-   /* Initialize BPod serial communication with 1.312.500 bps*/
-   uart1_init(67, -7, false);
-   uart1_enable();
-
-   /* Initialize BPod reply */
-   load_device_name_to_bpod_cmds(MAJOR_FW_VERSION, default_device_name, 9);
-
 	/* Initialize ADC */
 	PR_PRPA &= ~(PR_ADC_bm);									// Remove power reduction
 	ADCA_CTRLA = ADC_ENABLE_bm;								// Enable ADCA
@@ -222,6 +218,14 @@ void core_callback_t_1ms(void)
    //core_func_send_event(ADD_REG_ADC_VALUES, true);   
 }
 
+/************************************************************************/
+/* Callbacks: clock control                                              */
+/************************************************************************/
+void core_callback_clock_to_repeater(void) {}
+void core_callback_clock_to_generator(void) {}
+void core_callback_clock_to_unlock(void) {}
+void core_callback_clock_to_lock(void) {}
+
 /************************************************************************/
 /* Callbacks: uart control                                              */
 /************************************************************************/

Firmware/Firmware.ATXMEGA/SoundCard/app_ios_and_regs.c

@@ -7,7 +7,7 @@
 /************************************************************************/
 void init_ios(void)
 {	/* Configure input pins */
-	io_pin2in(&PORTB, 0, PULL_IO_UP, SENSE_IO_EDGES_BOTH);               // DIN0
+	io_pin2in(&PORTB, 0, PULL_IO_UP, SENSE_IO_EDGE_RISING);              // DIN0
 	io_pin2in(&PORTD, 0, PULL_IO_UP, SENSE_IO_EDGES_BOTH);               // DIN1
 	io_pin2in(&PORTC, 0, PULL_IO_UP, SENSE_IO_EDGES_BOTH);               // DIN2
 	io_pin2in(&PORTC, 5, PULL_IO_UP, SENSE_IO_EDGE_RISING);              // CMD_LATCHED

Firmware/Firmware.ATXMEGA/SoundCard/cpu.h

@@ -142,6 +142,8 @@ void timer_type1_wait(TC1_t* timer, uint8_t prescaler, uint16_t target_count);
 /************************************************************************/
 /* EEPROM                                                               */
 /************************************************************************/
+bool eeprom_is_busy(void);
+
 uint8_t eeprom_rd_byte(uint16_t addr);
 void eeprom_wr_byte(uint16_t addr, uint8_t byte);
 
@@ -171,6 +173,10 @@ int32_t eeprom_rd_i32(uint16_t addr);
 #define PRESCALER_ADC_DIV256	ADC_PRESCALER_DIV256_gc
 #define PRESCALER_ADC_DIV512	ADC_PRESCALER_DIV512_gc
 
+void adc_A_initialize_single_ended(uint8_t analog_reference);
+int16_t adc_A_read_channel(uint8_t index);
+void adc_A_calibrate_offset(uint8_t index);
+
 uint16_t adcA_unsigned_single_ended(ADC_t* adc, uint8_t res, uint8_t ref , uint8_t prescaler, uint8_t adc_pin, TC0_t* timer);
 
 #endif /* _CPU_1V1_H_ */

Firmware/Firmware.ATXMEGA/SoundCard/hwbp_core.h

@@ -18,9 +18,12 @@ typedef struct {
 	uint16_t usecond;
 } timestamp_t;
 
+// Used to define the clock direction default of the device.
+void core_callback_define_clock_default(void);
+
 // It's the first callback used, right after booting the core.
 // The pins, ports and external hardware should be initialized.
-void core_callback_1st_config_hw_after_boot(void);
+void core_callback_initialize_hardware(void);
 
 // Used to initialize the registers.
 // All registers should be written to their default state.
@@ -43,7 +46,6 @@ void core_callback_device_to_active(void);
 void core_callback_device_to_speed(void);
 
 
-
 // Called before execute the timer interrupts
 void core_callback_t_before_exec(void);
 // Called after execute the timer interrupts
@@ -57,7 +59,6 @@ void core_callback_t_500us(void);
 void core_callback_t_new_second(void);
 
 
-
 // Read from an application register.
 bool core_read_app_register(uint8_t add, uint8_t type);
 // Write to an application register.
@@ -68,6 +69,48 @@ bool hwbp_read_common_reg(uint8_t add, uint8_t type);
 bool hwbp_write_common_reg(uint8_t add, uint8_t type, uint8_t * content, uint16_t n_elements);
 
 
+/************************************************************************/
+/* Register RESET_APP                                                   */
+/************************************************************************/
+// Write to common register RESET_APP.
+bool hwbp_write_common_reg_RESET_APP(void *a);
+
+// Used to save all registers to non-volatile memory
+bool core_save_all_registers_to_eeprom(void);
+
+
+/************************************************************************/
+/* Register CONFIG                                                      */
+/************************************************************************/
+// Write to common register CONFIG.
+bool hwbp_write_common_reg_CONFIG(void *a);
+// Read from common register CONFIG.
+void hwbp_read_common_reg_CONFIG(void);
+
+// Called when the application should configure the hardware to repeat the harp timestamp clock input.
+void core_callback_clock_to_repeater(void);
+// Called when the application should configure the hardware to generate the harp timestamp clock.
+void core_callback_clock_to_generator(void);
+// Called when the timestamp lock is changed to unlocked.
+void core_callback_clock_to_unlock(void);
+// Called when the timestamp lock is changed to locked.
+void core_callback_clock_to_lock(void);
+
+// Used to know if the device is repeating the harp timestamp clock
+bool core_bool_device_is_repeater(void);
+// Used to know if the device is generating the harp timestamp clock
+bool core_bool_device_is_generator(void);
+// Used to check if the timestamp register is locked
+bool core_bool_clock_is_locked(void);
+
+// Used to set the device as a repeater
+bool core_device_to_clock_repeater(void);
+// Used to set the device as a generator
+bool core_device_to_clock_generator(void);
+// Used to lock the timestamp register
+bool core_clock_to_lock(void);
+// Used to unlock the timestamp register
+bool core_clock_to_unlock(void);
 
 
 // It is mandatory that this function is the first of the application code.
@@ -81,7 +124,11 @@ void core_func_start_core (
     uint8_t *pointer_to_app_regs,
     const uint16_t app_mem_size_to_save,
     const uint8_t num_of_app_registers,
-    const uint8_t *device_name);
+    const uint8_t *device_name,
+	const bool	device_is_able_to_repeat_clock,
+	const bool	device_is_able_to_generate_clock,
+	const uint8_t default_timestamp_offset
+	);
 
 // Call this function in case of error
 // A power up or reset must be performed to remove the device from this state
@@ -113,6 +160,7 @@ uint16_t core_func_read_R_TIMESTAMP_MICRO(void);
 
 
 
+
 // Return "true" if the LEDs can be ON.
 bool core_bool_is_visual_enabled(void);
 // Return "true" if the device is in Speed Mode.

Firmware/Firmware.ATXMEGA/SoundCard/hwbp_core_regs.h

@@ -10,18 +10,21 @@
 #define ADD_R_HW_VERSION_H      0x01    // U8
 #define ADD_R_HW_VERSION_L      0x02    // U8
 #define ADD_R_ASSEMBLY_VERSION  0x03    // U8
-#define ADD_R_HARP_VERSION_H    0x04    // U8
-#define ADD_R_HARP_VERSION_L    0x05    // U8
+#define ADD_R_CORE_VERSION_H    0x04    // U8
+#define ADD_R_CORE_VERSION_L    0x05    // U8
 #define ADD_R_FW_VERSION_H      0x06    // U8
 #define ADD_R_FW_VERSION_L      0x07    // U8
 #define ADD_R_TIMESTAMP_SECOND  0x08    // U32
 #define ADD_R_TIMESTAMP_MICRO   0x09    // U16
 #define ADD_R_OPERATION_CTRL    0x0A    // U8
 #define ADD_R_RESET_DEV         0x0B    // U8
 #define ADD_R_DEVICE_NAME       0x0C    // U8
+#define ADD_R_SERIAL_NUMBER     0x0D    // U16
+#define ADD_R_CONFIG            0x0E    // U8
+#define ADD_R_TIMESTAMP_OFFSET  0x0F    // U8
 
 /* Memory limits */
-#define COMMON_BANK_ADD_MAX             0x0C
+#define COMMON_BANK_ADD_MAX             0x0F
 #define COMMON_BANK_ABSOLUTE_ADD_MAX    0x1C
 
 /* R_OPERATION_CTRL */
@@ -43,8 +46,19 @@
 
 #define B_SAVE              (1<<2)
 
+#define B_NAME_TO_DEFAULT   (1<<3)
+
 #define B_BOOT_DEF          (1<<6)
 #define B_BOOT_EE           (1<<7)
 
+/* ADD_R_CONFIG */
+#define B_CLK_REP           (1<<0)
+#define B_CLK_GEN           (1<<1)
+#define B_CLK_SAVE          (1<<2)
+#define B_REP_ABLE          (1<<3)
+#define B_GEN_ABLE          (1<<4)
+#define B_CLK_UNLOCK        (1<<6)
+#define B_CLK_LOCK          (1<<7)
+
 
 #endif /* _HWBP_CORE_REGS_H_ */

Firmware/Firmware.ATXMEGA/SoundCard/hwbp_core_types.h

@@ -26,9 +26,9 @@
 #define MSK_TIMESTAMP_AT_PAYLOAD	0x10
 
 /************************************************************************/
-/* Maximum size of an entire packet (header to chksum)                  */
+/* Maximum size of a received packet                                    */
 /************************************************************************/
-#define MAX_PACKET_SIZE				256
+#define MAX_PACKET_SIZE				255
 
 
 #endif /* _HWBP_CORE_TYPES_H_ */

Firmware/Firmware.ATXMEGA/SoundCard/hwbp_sync.h

@@ -0,0 +1,44 @@
+#ifndef _HWBP_SYNC_H_
+#define _HWBP_SYNC_H_
+#include <avr/io.h>
+
+
+/************************************************************************/
+/* Prototypes                                                           */
+/************************************************************************/
+void initialize_timestamp_uart (uint32_t * timestamp_pointer);
+void reset_sync_counter (void);
+void trigger_sync_timer (void);
+
+
+/************************************************************************/
+/* Reset sync counter                                                   */
+/************************************************************************/
+#if defined(__AVR_ATxmega16A4U__)
+    #define RESET_TIMESTAMP_COUNTER reset_sync_counter()
+#else
+    #define RESET_TIMESTAMP_COUNTER
+#endif
+
+
+/************************************************************************/
+/* Trigger timer                                                        */
+/************************************************************************/
+#if defined(__AVR_ATxmega16A4U__)
+    #define SYNC_TRIGGER_TIMER trigger_sync_timer()
+#else
+    #define SYNC_TRIGGER_TIMER
+#endif
+
+
+/************************************************************************/
+/* Control when the device lost sync                                    */
+/************************************************************************/
+#if defined(__AVR_ATxmega16A4U__)
+    #define INCREASE_LOST_SYNC_COUNTER
+#else
+    #define INCREASE_LOST_SYNC_COUNTER device_lost_sync_counter++
+#endif
+
+
+#endif /* _HWBP_SYNC_H_ */

Firmware/Firmware.ATXMEGA/SoundCard/interrupts.c

@@ -3,6 +3,7 @@
 #include "app_ios_and_regs.h"
 #include "app_funcs.h"
 #include "hwbp_core.h"
+//#include "parallel_bus.h"
 
 /************************************************************************/
 /* Declare application registers                                        */
@@ -31,7 +32,19 @@ extern AppRegs app_regs;
 /************************************************************************/
 ISR(PORTB_INT0_vect, ISR_NAKED)
 {
-   reti();
+
+	//app_regs.REG_PLAY_SOUND_OR_FREQ = 3; //default plays index 3
+	//app_write_REG_PLAY_SOUND_OR_FREQ(&app_regs.REG_PLAY_SOUND_OR_FREQ);
+
+	uint8_t aux = read_DIN0;
+
+	app_regs.REG_DIGITAL_INPUTS = aux;
+	app_write_REG_DIGITAL_INPUTS(&app_regs.REG_DIGITAL_INPUTS);
+	core_func_send_event(ADD_REG_DIGITAL_INPUTS, true);
+
+	par_cmd_start_sound(app_regs.REG_DI0_SOUND_INDEX, app_regs.REG_ATTNUATION_LEFT, app_regs.REG_ATTENUATION_RIGHT);
+
+	reti();
 }
 
 /************************************************************************/
@@ -50,7 +63,7 @@ ISR(PORTC_INT0_vect, ISR_NAKED)
 {
    reti();
 }
-/*
+*/
 
 /************************************************************************/
 /* PIC32_READY                                                          */