Notes on additional optimization potential

indigodarkwolf · May 1, 2020 · 77e4454 · 77e4454
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commit 77e4454
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/vera.inc b/vera.inc
@@ -714,6 +714,13 @@ DATA_ADDR=data_addr>>5
 	txa
 	ror
 	sta VERA_ien
+
+	; Oh, but he wasn't done with optimizing the general problem, however this method doesn't work with VERA_ien because it's not vanilla memory:
+
+	; asl VERA_ien 	; move bit 6-0 left - destroying bit 7
+	; lda source+1
+	; lsr 			; put bit 0 into C
+	; ror VERA_ien 	; put C into bit 7, moving bit 6-0 back where they started
 .endmacro
 
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