Remove GenXKernelBuilder::buildUnaryOperator

Remove GenXKernelBuilder::buildUnaryOperator since it covers only FNEG instruction, that is always handled by GenXKernelBuilder::buildLoneOperand
intel · Sep 5, 2023 · 5a8e871 · 5a8e871
1 parent b5bbe4c
commit 5a8e871
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Showing 2 changed files with 0 additions and 105 deletions.
diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp
@@ -637,8 +637,6 @@ class GenXKernelBuilder {
                        const DstOpndDesc &DstDesc);
   void buildBinaryOperator(BinaryOperator *BO, genx::BaleInfo BI, unsigned Mod,
                            const DstOpndDesc &DstDesc);
-  void buildUnaryOperator(UnaryOperator *UO, genx::BaleInfo BI, unsigned Mod,
-                          const DstOpndDesc &DstDesc);
   void buildBoolBinaryOperator(BinaryOperator *BO);
   void buildSymbolInst(CallInst *GAddrInst, unsigned Mod,
                        const DstOpndDesc &DstDesc);
@@ -2938,8 +2936,6 @@ bool GenXKernelBuilder::buildMainInst(Instruction *Inst, BaleInfo BI,
         vc::isLegalPrintFormatIndexGEP(*GEPI),
         "only vc.internal.print.format.index src GEP can still be "
         "present at this stage");
-  } else if (UnaryOperator *UO = dyn_cast<UnaryOperator>(Inst)) {
-    buildUnaryOperator(UO, BI, Mod, DstDesc);
   } else if (auto *CI = dyn_cast<CallInst>(Inst)) {
     if (CI->isInlineAsm())
       buildInlineAsm(CI);
@@ -4334,52 +4330,6 @@ void GenXKernelBuilder::buildJoin(CallInst *Join, BranchInst *Branch) {
   // looking for gotos targeting the basic block's label.
 }
 
-/***********************************************************************
- * buildUnaryOperator : build code for an unary operator
- *
- * Enter:   UO = the UnaryOperator
- *          BI = BaleInfo for UO
- *          Mod = modifier bits for destination
- *          WrRegion = 0 else wrregion for destination
- *          WrRegionBI = BaleInfo for WrRegion
- */
-void GenXKernelBuilder::buildUnaryOperator(UnaryOperator *UO, BaleInfo BI,
-                                           unsigned Mod,
-                                           const DstOpndDesc &DstDesc) {
-  ISA_Opcode Opcode = ISA_RESERVED_0;
-  Signedness DstSigned = SIGNED;
-  Signedness SrcSigned = SIGNED;
-  unsigned Mod1 = 0;
-  VISA_Exec_Size ExecSize = EXEC_SIZE_1;
-  if (auto *VT = dyn_cast<IGCLLVM::FixedVectorType>(UO->getType()))
-    ExecSize = getExecSizeFromValue(VT->getNumElements());
-
-  switch (UO->getOpcode()) {
-  case Instruction::FNeg:
-    Opcode = ISA_MOV;
-    Mod1 ^= MODIFIER_NEG;
-    break;
-  default:
-    report_fatal_error("buildUnaryOperator: unimplemented unary operator");
-  }
-
-  VISA_VectorOpnd *Dst = createDestination(UO, DstSigned, Mod, DstDesc);
-
-  VISA_VectorOpnd *Src0 = nullptr;
-  VISA_PredOpnd *Pred = createPredFromWrRegion(DstDesc);
-
-  Src0 = createSourceOperand(UO, SrcSigned, 0, BI, Mod1);
-
-  auto ExecMask = getExecMaskFromWrRegion(DstDesc);
-
-  if (Opcode == ISA_MOV) {
-    appendVISADataMovementInst(ISA_MOV, Pred, Mod1 & MODIFIER_SAT, ExecMask,
-                               ExecSize, Dst, Src0);
-    return;
-  }
-  report_fatal_error("buildUnaryOperator: unimplemented opcode");
-}
-
 /***********************************************************************
  * getCommonSignedness : predict the most suitable sign of a instruction based
  *                       on incoming values.

diff --git a/IGC/VectorCompiler/test/CisaBuilder/fneg.ll b/IGC/VectorCompiler/test/CisaBuilder/fneg.ll