IGC: Fixed LSC checker in VectorProcess

In VectorProcess::reLayoutLoadStore, checks if LSC is used by "EmitPass::shouldGenerateLSCQuery" instead of "CPlatform::LSCEnabled" to align with the checker used in EmitPass::emitStoreRawIndexed. This avoids QW scatter/gather messages being generated on platforms those supporting LSC but don't support QW scatter/gather messages.
intel · Sep 27, 2023 · 64db140 · 64db140
1 parent d0e3e4e
commit 64db140
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diff --git a/IGC/Compiler/CISACodeGen/VectorProcess.cpp b/IGC/Compiler/CISACodeGen/VectorProcess.cpp
@@ -311,7 +311,7 @@ bool VectorProcess::reLayoutLoadStore(Instruction* Inst)
             useQW = has_QW_BTS_GS && nelts == 1 && (eTyBytes == 8U && align >= 8U);
         }
 
-        if (cgCtx->platform.LSCEnabled())
+        if (EmitPass::shouldGenerateLSCQuery(*cgCtx, Inst) == Tristate::True)
         {
             // With LSC, want to use QW if element size is 8 bytes.
             useQW = (eTyBytes == 8);