G4 senddesc refactor

clarify function names functions to convert DataSize to bytes comments to clarify G4_SendDesc::getElemsPerAddr and getElemSize
intel · Jun 20, 2023 · 7525602 · 7525602
1 parent 02f6f54
commit 7525602
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Showing 4 changed files with 50 additions and 9 deletions.
diff --git a/visa/BuildIR.h b/visa/BuildIR.h
@@ -2053,7 +2053,7 @@ class IR_Builder {
   LSC_DATA_ELEMS lscGetElementNum(unsigned eNum) const;
   int lscEncodeAddrSize(LSC_ADDR_SIZE addr_size, uint32_t &desc,
                         int &status) const;
-  uint32_t lscComputeAddrSize(LSC_ADDR_SIZE addr_size, int &status) const;
+  uint32_t lscComputeAddrSizeBits(LSC_ADDR_SIZE addr_size, int &status) const;
   int lscEncodeDataSize(LSC_DATA_SIZE data_size, uint32_t &desc,
                         int &status) const;
   uint32_t lscComputeDataSize(LSC_DATA_SIZE data_size, int &status) const;

diff --git a/visa/G4_SendDescs.cpp b/visa/G4_SendDescs.cpp
@@ -286,7 +286,42 @@ uint32_t vISA::GetDataSizeEncoding(DataSize ds) {
   }
   return 0;
 }
-
+uint32_t vISA::GetDataSizeBytesReg(DataSize ds)
+{
+  switch (ds) {
+  case DataSize::D8:
+    return 1;
+  case DataSize::D16:
+    return 2;
+  case DataSize::D32:
+  case DataSize::D8U32:
+  case DataSize::D16U32:
+    return 4;
+  case DataSize::D64:
+    return 8;
+  default:
+    break;
+  }
+  return 0;
+}
+uint32_t vISA::GetDataSizeBytesMem(DataSize ds)
+{
+  switch (ds) {
+  case DataSize::D8:
+  case DataSize::D8U32:
+    return 1;
+  case DataSize::D16:
+  case DataSize::D16U32:
+    return 2;
+  case DataSize::D32:
+    return 4;
+  case DataSize::D64:
+    return 8;
+  default:
+    break;
+  }
+  return 0;
+}
 uint32_t vISA::GetDataOrderEncoding(DataOrder dord) {
   switch (dord) {
   case DataOrder::NONTRANSPOSE:

diff --git a/visa/G4_SendDescs.hpp b/visa/G4_SendDescs.hpp
@@ -77,6 +77,8 @@ enum class DataSize {
 
 std::string ToSymbol(DataSize d);
 uint32_t GetDataSizeEncoding(DataSize ds);
+uint32_t GetDataSizeBytesReg(DataSize ds); // returns 0 on invalid
+uint32_t GetDataSizeBytesMem(DataSize ds); // returns 0 on invalid
 
 // Data order
 enum class DataOrder {
@@ -123,6 +125,7 @@ enum class DataChMask {
   // quad channels
   XYZW = X | Y | Z | W,
 };
+// test encoding as [3:0]
 static_assert(int(DataChMask::XYZW) == 0xF);
 static_assert(int(DataChMask::YZW) == 0xE);
 
@@ -305,14 +308,17 @@ class G4_SendDesc {
            getAccessType() == SendAccess::READ_WRITE;
   }
   bool isReadWrite() const { return getAccessType() == SendAccess::READ_WRITE; }
-  // Returns the nubmer of elements each address (or coordinate)
-  // accesses
-  // E.g. d32x2 returns 2 (representing a message that loads
-  // a pair per address).
+
+  // Returns the nubmer of elements each address (or coordinate) accesses
+  //   E.g. d32x2 would return 2 (a message that loads a pair per address)
+  //   E.g. d32.xyz would return 3
+  //   E.g. d32x64t would return 64
   virtual unsigned getElemsPerAddr() const = 0;
   //
   // Returns the size in bytes of each element.
   // E.g. a d32x2 returns 4 (d32 is 32b)
+  // This is the size of the element in memory not the register file
+  // (which might widen the result in GRF).
   virtual unsigned getElemSize() const = 0;
 
   //

diff --git a/visa/VisaToG4/TranslateSendLdStLsc.cpp b/visa/VisaToG4/TranslateSendLdStLsc.cpp
@@ -841,7 +841,7 @@ int IR_Builder::translateLscTypedInst(
       return;
     }
     const G4_Declare *decl = getDeclare(srcAddr);
-    uint32_t addrSizeBits = lscComputeAddrSize(addrSize, status);
+    uint32_t addrSizeBits = lscComputeAddrSizeBits(addrSize, status);
     const int regsPerAddrChannel =
         std::max<int>(1, addrSizeBits * (int)execSize / 8 / BYTES_PER_GRF);
     checkPayloadSize(which, decl, regsPerAddrChannel);
@@ -963,8 +963,8 @@ int IR_Builder::lscEncodeAddrSize(LSC_ADDR_SIZE addrSize, uint32_t &desc,
   return addrSizeBits;
 }
 
-uint32_t IR_Builder::lscComputeAddrSize(LSC_ADDR_SIZE addrSize,
-                                        int &status) const {
+uint32_t IR_Builder::lscComputeAddrSizeBits(LSC_ADDR_SIZE addrSize,
+                                            int &status) const {
   int addrSizeBits = 32;
   switch (addrSize) {
   case LSC_ADDR_SIZE_16b: