LIT opaque pointers support (part 2)

This change is a part of the effort to support opaque pointers in newer LLVM versions
intel · Oct 24, 2024 · b6c58e9 · b6c58e9
1 parent 40bfde2
commit b6c58e9
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diff --git a/IGC/VectorCompiler/test/CMABI/debug-bool.ll b/IGC/VectorCompiler/test/CMABI/debug-bool.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2022 Intel Corporation
+; Copyright (C) 2022-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 ;
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 ; ------------------------------------------------
 ; CMABI
 ; ------------------------------------------------
@@ -20,7 +21,8 @@
 ; CHECK: void @llvm.dbg.value(metadata <2 x i1> [[VAL1_V:%[A-z0-9]*]], metadata [[VAL1_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL1_LOC:![0-9]*]]
 ; CHECK: void @llvm.dbg.value(metadata i1 [[VAL2_V:%[A-z0-9]*]], metadata [[VAL2_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL2_LOC:![0-9]*]]
 ; CHECK: [[VAL3_V:%[A-z0-9]*]] = {{.*}}, !dbg [[VAL3_LOC:![0-9]*]]
-; CHECK: void @llvm.dbg.value(metadata <2 x i1>* [[VAL3_V]], metadata [[VAL3_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL3_LOC]]
+; CHECK-TYPED-PTRS: void @llvm.dbg.value(metadata <2 x i1>* [[VAL3_V]], metadata [[VAL3_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL3_LOC]]
+; CHECK-OPAQUE-PTRS: void @llvm.dbg.value(metadata ptr [[VAL3_V]], metadata [[VAL3_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL3_LOC]]
 ; CHECK: [[VAL4_V:%[A-z0-9]*]] = {{.*}}, !dbg [[VAL4_LOC:![0-9]*]]
 ; CHECK: void @llvm.dbg.value(metadata <2 x i1> [[VAL4_V]], metadata [[VAL4_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL4_LOC]]
 

diff --git a/IGC/VectorCompiler/test/CMABI/debuginfo_kernel_implicit.ll b/IGC/VectorCompiler/test/CMABI/debuginfo_kernel_implicit.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
@@ -16,7 +17,8 @@ target triple = "spir64-unknown-unknown"
 ; CHECK-LABEL: @K1
 ; CHECK-SAME: (i32 %0, <3 x i16> %__arg_llvm.genx.local.id16, i64 %privBase)
 ; CHECK: [[K1_ALLOCA:%[^ ]+]] = alloca <3 x i16>
-; CHECK: call void @llvm.dbg.declare(metadata <3 x i16>* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK-TYPED-PTRS: call void @llvm.dbg.declare(metadata <3 x i16>* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK-OPAQUE-PTRS: call void @llvm.dbg.declare(metadata ptr [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
 ; CHECK-DAG: ![[#K1_SP:]] = distinct !DISubprogram(name: "K1",
 ; CHECK-DAG: ![[#K1VAR]] = !DILocalVariable(name: "__llvm_genx_local_id16", scope: ![[#K1_SP]], file: ![[#]], type: ![[#K1VAR_TYPE:]], flags: DIFlagArtificial)
 ; CHECK-DAG: ![[#K1VAR_TYPE]] = !DICompositeType(tag: DW_TAG_array_type, baseType: ![[#K1VAR_BASE_TYPE:]], size: 48, flags: DIFlagVector, elements: ![[#K1VAR_ELEMENTS:]])

diff --git a/IGC/VectorCompiler/test/CMABI/debuginfo_kernel_localized.ll b/IGC/VectorCompiler/test/CMABI/debuginfo_kernel_localized.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
@@ -16,7 +17,8 @@ target triple = "spir64-unknown-unknown"
 ; CHECK-LABEL: @K1
 ; CHECK-SAME: (i32 %0, i64 %privBase)
 ; CHECK: [[K1_ALLOCA:%[^ ]+]] = alloca i32
-; CHECK: call void @llvm.dbg.declare(metadata i32* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK-TYPED-PTRS: call void @llvm.dbg.declare(metadata i32* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK-OPAQUE-PTRS: call void @llvm.dbg.declare(metadata ptr [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
 ; CHECK-DAG: ![[#K1_SP:]] = distinct !DISubprogram(name: "K1",
 ; CHECK-DAG: ![[#K1VAR]] = !DILocalVariable(name: "x", scope: ![[#K1_SP]], file: ![[#]], type: ![[#TYPE:]], flags: DIFlagArtificial)
 ; CHECK-DAG: ![[#TYPE]] = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)

diff --git a/IGC/VectorCompiler/test/CMABI/debuginfo_stackcall_global.ll b/IGC/VectorCompiler/test/CMABI/debuginfo_stackcall_global.ll
@@ -1,13 +1,15 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck --check-prefix=CHECK_S1 %s
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck --check-prefix=CHECK_K1 %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK_S1,CHECK_S1-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK_S1,CHECK_S1-OPAQUE-PTRS
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK_K1,CHECK_K1-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK_K1,CHECK_K1-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
@@ -17,7 +19,8 @@ target triple = "spir64-unknown-unknown"
 ; CHECK_S1-LABEL: @S1
 ; CHECK_S1-SAME: (i32 %0, i32 %x.in)
 ; CHECK_S1: [[S1_ALLOCA:%[^ ]+]] = alloca i32
-; CHECK_S1: call void @llvm.dbg.declare(metadata i32* [[S1_ALLOCA]], metadata ![[#S1VAR:]], metadata !DIExpression()), !dbg ![[#S1LOC:]]
+; CHECK_S1-TYPED-PTRS: call void @llvm.dbg.declare(metadata i32* [[S1_ALLOCA]], metadata ![[#S1VAR:]], metadata !DIExpression()), !dbg ![[#S1LOC:]]
+; CHECK_S1-OPAQUE-PTRS: call void @llvm.dbg.declare(metadata ptr [[S1_ALLOCA]], metadata ![[#S1VAR:]], metadata !DIExpression()), !dbg ![[#S1LOC:]]
 ; CHECK_S1-DAG: ![[#S1_SP:]] = distinct !DISubprogram(name: "S1",
 ; CHECK_S1-DAG: ![[#S1VAR]] = !DILocalVariable(name: "x", scope: ![[#S1_SP]], file: ![[#]], type: ![[#S1TYPE:]], flags: DIFlagArtificial)
 ; CHECK_S1-DAG: ![[#S1TYPE]] = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
@@ -31,7 +34,8 @@ define internal spir_func <8 x i32> @S1(i32 %0) #1 !dbg !17 {
 ; CHECK_K1-LABEL: @K1
 ; CHECK_K1-SAME: (i32 %0, i64 %privBase)
 ; CHECK_K1: [[K1_ALLOCA:%[^ ]+]] = alloca i32
-; CHECK_K1: call void @llvm.dbg.declare(metadata i32* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK_K1-TYPED-PTRS: call void @llvm.dbg.declare(metadata i32* [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
+; CHECK_K1-OPAQUE-PTRS: call void @llvm.dbg.declare(metadata ptr [[K1_ALLOCA]], metadata ![[#K1VAR:]], metadata !DIExpression()), !dbg ![[#K1LOC:]]
 ; CHECK_K1-DAG: ![[#K1_SP:]] = distinct !DISubprogram(name: "K1",
 ; CHECK_K1-DAG: ![[#K1VAR]] = !DILocalVariable(name: "x", scope: ![[#K1_SP]], file: ![[#]], type: ![[#K1TYPE:]], flags: DIFlagArtificial)
 ; CHECK_K1-DAG: ![[#K1TYPE]] = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)

diff --git a/IGC/VectorCompiler/test/CMABI/func_with_taken_addr.ll b/IGC/VectorCompiler/test/CMABI/func_with_taken_addr.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32"
 
@@ -15,8 +16,10 @@ define internal spir_func void @foo(<8 x i32>* %vector.ref) {
   ret void
 }
 ; COM: should stay the same
-; CHECK:      define internal spir_func void @foo(<8 x i32>* %vector.ref) {
-; CHECK-NEXT:   %vector.ld = load <8 x i32>, <8 x i32>* %vector.ref
+; CHECK-TYPED-PTRS:      define internal spir_func void @foo(<8 x i32>* %vector.ref) {
+; CHECK-TYPED-PTRS-NEXT:   %vector.ld = load <8 x i32>, <8 x i32>* %vector.ref
+; CHECK-OPAQUE-PTRS:      define internal spir_func void @foo(ptr %vector.ref) {
+; CHECK-OPAQUE-PTRS-NEXT:   %vector.ld = load <8 x i32>, ptr %vector.ref
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
 
@@ -29,8 +32,10 @@ define dllexport void @kernel(i32 %val) {
 ; COM: should stay the same
 ; CHECK:      define dllexport void @kernel(i32 %val) {
 ; CHECK-NEXT:   %vec.alloca = alloca <8 x i32>, align 32
-; CHECK-NEXT:   call spir_func void @foo(<8 x i32>* nonnull %vec.alloca)
-; CHECK-NEXT:   %indirect.user = ptrtoint void (<8 x i32>*)* @foo to i32
+; CHECK-TYPED-PTRS-NEXT:   call spir_func void @foo(<8 x i32>* nonnull %vec.alloca)
+; CHECK-TYPED-PTRS-NEXT:   %indirect.user = ptrtoint void (<8 x i32>*)* @foo to i32
+; CHECK-OPAQUE-PTRS-NEXT:   call spir_func void @foo(ptr nonnull %vec.alloca)
+; CHECK-OPAQUE-PTRS-NEXT:   %indirect.user = ptrtoint ptr @foo to i32
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
 

diff --git a/IGC/VectorCompiler/test/CMABI/global_without_align.ll b/IGC/VectorCompiler/test/CMABI/global_without_align.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32"
 
@@ -18,7 +19,8 @@ target datalayout = "e-p:64:64-i64:64-n8:16:32"
 ; FIXME: Make 'align 1' an unconditional part of the check after LLVM 9-10
 ;        gets abolished.
 ; CHECK: %global.int.local = alloca i32{{(, align 1)?}}
-; CHECK: store i32 0, i32* %global.int.local{{(, align 1)?}}
+; CHECK-TYPED-PTRS: store i32 0, i32* %global.int.local{{(, align 1)?}}
+; CHECK-OPAQUE-PTRS: store i32 0, ptr %global.int.local{{(, align 1)?}}
 define dllexport void @kernel(float %kernel.value) {
   %1 = load i32, i32* @global.int, align 4
   ret void

diff --git a/IGC/VectorCompiler/test/CMABI/linearization.ll b/IGC/VectorCompiler/test/CMABI/linearization.ll
@@ -1,16 +1,18 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2021 Intel Corporation
+; Copyright (C) 2021-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -cmabi -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
 
+; CHECK: define dllexport void @cmk_kmeans(i8
 define dllexport void @cmk_kmeans(i1 zeroext %0, i64 %privBase) #0 {
   ret void
 }
@@ -30,14 +32,8 @@ attributes #0 = { noinline nounwind "CMGenxMain" "oclrt"="1" }
 !1 = !{i32 1, i32 2}
 !2 = !{}
 !3 = !{i16 6, i16 14}
-; CHECK: !4 = !{void
-; CHECK-NOT: i1
-; CHECK-SAME: i8
 !4 = !{void (i1, i64)* @cmk_kmeans, !"cmk_kmeans", !5, i32 0, i32 0, !6, !7, i32 0}
 !5 = !{i32 0, i32 96}
 !6 = !{i32 0}
 !7 = !{!"buffer_t read_write", !"buffer_t read_write", !"buffer_t read_write", !"", !""}
-; CHECK: !8 = !{void
-; CHECK-NOT: i1
-; CHECK-SAME: i8
 !8 = !{void (i1, i64)* @cmk_kmeans, null, null, !2, null}
diff --git a/IGC/VectorCompiler/test/GenXCFSimplification/debug.ll b/IGC/VectorCompiler/test/GenXCFSimplification/debug.ll
@@ -1,12 +1,13 @@
 ;=========================== begin_copyright_notice ============================
 ;
-; Copyright (C) 2022 Intel Corporation
+; Copyright (C) 2022-2024 Intel Corporation
 ;
 ; SPDX-License-Identifier: MIT
 ;
 ;============================ end_copyright_notice =============================
 ;
-; RUN: %opt %use_old_pass_manager% -GenXCFSimplification -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -GenXCFSimplification -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -GenXCFSimplification -march=genx64 -mtriple=spir64-unknown-unknown  -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 ; ------------------------------------------------
 ; GenXCFSimplification
 ; ------------------------------------------------
@@ -23,7 +24,8 @@
 ; CHECK: [[VAL3_V:%[A-z0-9.]*]] = {{.*}}, !dbg [[VAL3_LOC:![0-9]*]]
 ; CHECK: void @llvm.dbg.value(metadata i32 [[VAL3_V]], metadata [[VAL3_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL3_LOC]]
 ; CHECK: [[VAL4_V:%[A-z0-9.]*]] = {{.*}}, !dbg [[VAL4_LOC:![0-9]*]]
-; CHECK: void @llvm.dbg.value(metadata i32* [[VAL4_V]], metadata [[VAL4_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL4_LOC]]
+; CHECK-TYPED-PTRS: void @llvm.dbg.value(metadata i32* [[VAL4_V]], metadata [[VAL4_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL4_LOC]]
+; CHECK-OPAQUE-PTRS: void @llvm.dbg.value(metadata ptr [[VAL4_V]], metadata [[VAL4_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL4_LOC]]
 ; CHECK: [[VAL5_V:%[A-z0-9.]*]] = {{.*}}, !dbg [[VAL5_LOC:![0-9]*]]
 ; CHECK: void @llvm.dbg.value(metadata i32 [[VAL5_V]], metadata [[VAL5_MD:![0-9]*]], metadata !DIExpression()), !dbg [[VAL5_LOC]]
 ; CHECK: [[VAL6_V:%[A-z0-9.]*]] = {{.*}}, !dbg [[VAL6_LOC:![0-9]*]]

diff --git a/IGC/VectorCompiler/test/GenXDetectPointerArg/integer.ll b/IGC/VectorCompiler/test/GenXDetectPointerArg/integer.ll
@@ -6,7 +6,8 @@
 ;
 ;============================ end_copyright_notice =============================
 ;
-; RUN: %opt %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 @data = internal global <8 x i64> undef, align 64, !spirv.Decorations !0 #0
 
@@ -39,7 +40,8 @@ attributes #3 = { nofree nounwind readonly "target-cpu"="XeHPC" }
 !llvm.module.flags = !{!20}
 
 ; CHECK: !genx.kernels = !{![[KERNEL:[0-9]+]]}
-; CHECK: ![[KERNEL]] = !{void (i64, i64)* @kernel, !"kernel", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-TYPED-PTRS: ![[KERNEL]] = !{void (i64, i64)* @kernel, !"kernel", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-OPAQUE-PTRS: ![[KERNEL]] = !{ptr @kernel, !"kernel", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
 ; CHECK: ![[NODE]] = !{!"svmptr_t", !""}
 
 !0 = !{!1, !2, !3, !4}

diff --git a/IGC/VectorCompiler/test/GenXDetectPointerArg/struct-alloca.ll b/IGC/VectorCompiler/test/GenXDetectPointerArg/struct-alloca.ll
@@ -6,7 +6,8 @@
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 
@@ -54,7 +55,8 @@ attributes #3 = { "target-cpu"="XeHPC" }
 !genx.kernel.internal = !{!10}
 
 ; CHECK: !genx.kernels = !{![[KERNEL:[0-9]+]]}
-; CHECK: ![[KERNEL]] = !{void (%struct.state*, i32 addrspace(1)*, i64, i8, i64, float)* @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-TYPED-PTRS: ![[KERNEL]] = !{void (%struct.state*, i32 addrspace(1)*, i64, i8, i64, float)* @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-OPAQUE-PTRS: ![[KERNEL]] = !{ptr @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
 ; CHECK: ![[NODE]] = !{!"svmptr_t", !"svmptr_t", !"", !"", !"svmptr_t", !""}
 
 !0 = !{i32 0, i32 100000}

diff --git a/IGC/VectorCompiler/test/GenXDetectPointerArg/struct-array-indirect.ll b/IGC/VectorCompiler/test/GenXDetectPointerArg/struct-array-indirect.ll
@@ -6,7 +6,8 @@
 ;
 ;============================ end_copyright_notice =============================
 
-; RUN: %opt %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s
+; RUN: %opt_typed_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS
+; RUN: %opt_opaque_ptrs %use_old_pass_manager% -GenXDetectPointerArg -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS
 
 target datalayout = "e-p:64:64-i64:64-n8:16:32:64"
 
@@ -62,7 +63,8 @@ attributes #2 = { "target-cpu"="XeHPC" }
 !genx.kernel.internal = !{!10}
 
 ; CHECK: !genx.kernels = !{![[KERNEL:[0-9]+]]}
-; CHECK: ![[KERNEL]] = !{void (%struct.state*, i32 addrspace(1)*, i64, i8, i64, i64, i64, float)* @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-TYPED-PTRS: ![[KERNEL]] = !{void (%struct.state*, i32 addrspace(1)*, i64, i8, i64, i64, i64, float)* @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
+; CHECK-OPAQUE-PTRS: ![[KERNEL]] = !{ptr @foo, !"foo", !{{[0-9]+}}, i32 0, !{{[0-9]+}}, !{{[0-9]+}}, ![[NODE:[0-9]+]], i32 0}
 ; CHECK: ![[NODE]] = !{!"svmptr_t", !"svmptr_t", !"", !"", !"svmptr_t", !"svmptr_t", !"svmptr_t", !""}
 
 !0 = !{i32 0, i32 100000}