Introduce an intrinsic for optimization fence in VC

The intrinsic prevents instructions from being combined or reassociated.
intel · Oct 22, 2024 · bc730c5 · bc730c5
1 parent 13f3921
commit bc730c5
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diff --git a/IGC/VectorCompiler/include/vc/InternalIntrinsics/Intrinsic_definitions.py b/IGC/VectorCompiler/include/vc/InternalIntrinsics/Intrinsic_definitions.py
@@ -113,6 +113,20 @@
                                "memory_effects":
                                    { "access": "NoModRef" }, },
 
+## ``llvm.vc.internal.optimization.fence`` : optimization fence
+## ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+##
+## * arg0: input value
+##
+## * Return value: the same as arg0
+##
+## The purpose of the intrinsic is to prevent the compiler from
+## optimizing the value.
+##
+    "optimization_fence" : { "result": "any",
+                             "arguments": [0],
+                             "attributes": "NoMem", },
+
 ### --------------
 ### ALU intrinsics
 ### --------------

diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXLowering.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXLowering.cpp
@@ -2166,6 +2166,10 @@ bool GenXLowering::processInst(Instruction *Inst) {
       return lowerHardwareThreadID(CI);
     case vc::InternalIntrinsic::logical_thread_id:
       return lowerLogicalThreadID(CI);
+    case vc::InternalIntrinsic::optimization_fence:
+      CI->replaceAllUsesWith(CI->getOperand(0));
+      ToErase.push_back(CI);
+      return true;
     case GenXIntrinsic::genx_nbarrier_arrive:
       return lowerNamedBarrierArrive(CI);
     case GenXIntrinsic::genx_dpas:

diff --git a/IGC/VectorCompiler/test/Lowering/optimization-fence.ll b/IGC/VectorCompiler/test/Lowering/optimization-fence.ll
@@ -0,0 +1,18 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2024 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+
+; RUN: %opt %use_old_pass_manager% -GenXLowering -march=genx64 -mcpu=XeHPC -mtriple=spir64-unknown-unknown -S < %s | FileCheck %s
+
+declare <16 x i32> @llvm.vc.internal.optimization.fence.v16i32(<16 x i32>)
+
+; CHECK-LABEL: @test(
+define <16 x i32> @test(<16 x i32> %a) {
+; CHECK: ret <16 x i32> %a
+  %call = call <16 x i32> @llvm.vc.internal.optimization.fence.v16i32(<16 x i32> %a)
+  ret <16 x i32> %call
+}