Revert "Revert "[frontend] Remove Complex Regex for MLIR Parsing (#4924)""

[anmyachev]

Closes #2653

This reverts commit ecc9bd4.

The issue looks like:

loc("/tmp/pytest-of-runner/pytest-0/popen-gw0/test_convert2d_dst_layout8_int21/test_convert2d.ttgir":4:30): error: #"triton_intel_gpu"<"dpas<{repeatCount=8, systolicDepth=8, executionSize = 8, opsPerChan = 1, threadsPerWarp = 32, warpsPerCTA=[4, 1], repCluster=[1, 1]}>"> : 'none' attribute created with unregistered dialect. If this is intended, please call allowUnregisteredDialects() on the MLIRContext, or use -allow-unregistered-dialect with the MLIR opt tool used

[anmyachev]

The main change is that for our backend, parse_mlir_module function only works correctly with the corresponding dialects.

[whitneywhtsang]

Why DPAS layout requires additional dialects while MMA layout doesn't?

[anmyachev]

MMA layout belongs to triton_gpu dialect:

intel-xpu-backend-for-triton/python/test/unit/language/test_core.py

Line 157 in 0187e36

return f"#{GPU_DIALECT}.nvidia_mma<{{versionMajor={self.version[0]}, versionMinor={self.version[1]}, warpsPerCTA={self.warps_per_cta}, CTAsPerCGA={self.ctas_per_cga}, CTASplitNum={self.cta_split_num}, CTAOrder={self.cta_order}, instrShape={self.instr_shape}}}>"

[anmyachev]

Dpas explicitly redefines the dialect (that implicitly comes from DistributedEncoding IIUC):

intel-xpu-backend-for-triton/third_party/intel/include/Dialect/TritonIntelGPU/IR/TritonIntelGPUAttrDefs.td

Lines 12 to 13 in 0187e36

	def DpasEncodingAttr : DistributedEncoding<"DpasEncoding", "intel_dpas_encoding",
	[MmaEncodingTrait], TritonIntelGPU_Dialect> {

[etiotto]

This is different from upstream code:

The "else" part is missing.... perhaps it belongs to a more recent upstream commit than the one we are trying to merge ?

Also, would adding the else part eliminate the need to add lines 100-103 ?

[anmyachev]

This is different from upstream code:

Yes, I made this change on purpose. Now, as far as I understand, the backend dialects should be initialized when calling the IRSource class constructor.

Also, would adding the else part eliminate the need to add lines 100-103 ?

No, because IRSource constructor also calls function self.module = ir.parse_mlir_module(self.path, context), which requires the backend dialects.

[anmyachev]

One example, we use dpas layout that requires an additional dialect:

intel-xpu-backend-for-triton/python/test/unit/language/test_core.py

Line 2669 in 0187e36

DpasLayout(repeatCount=8, systolic_depth=8, execution_size=8, ops_per_chan=1, threads_per_warp=32,

[whitneywhtsang]

Can this change be upstreamed?

[whitneywhtsang]

Why DPAS layout requires additional dialects while MMA layout doesn't?

[anmyachev]

Can this change be upstreamed?

I think there is a chance. I brought it to a form more similar to what I am trying to upstream.

@etiotto @whitneywhtsang could we merge it?

[etiotto]

@anmyachev what is the upstream PR for this changes ? Can you open an issue to track upstreaming the changes as well please ?