[SYCL][ESIMD] Change default cache hints for prefetch (#12931)

This patch makes it a requirement for user to specify both L1 and L2 cache hints when call prefetch() function, which is similar to the old lsc_prefetch() API.
intel · Mar 6, 2024 · 984c88c · 984c88c
1 parent 8027266
commit 984c88c
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Showing 3 changed files with 167 additions and 378 deletions.
diff --git a/sycl/include/sycl/ext/intel/esimd/memory.hpp b/sycl/include/sycl/ext/intel/esimd/memory.hpp
@@ -8595,10 +8595,10 @@ prefetch(const T *p, simd<OffsetT, N / VS> byte_offsets, simd_mask<N / VS> mask,
 
  constexpr auto L1Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L1_key>(
- cache_hint::uncached);
+ cache_hint::none);
  constexpr auto L2Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L2_key>(
- cache_hint::cached);
+ cache_hint::none);
  detail::prefetch_impl<T, VS, detail::lsc_data_size::default_size, L1Hint,
  L2Hint>(p, byte_offsets, mask);
 }
@@ -8769,10 +8769,10 @@ prefetch(const T *p, OffsetT byte_offset, simd_mask<1> mask,
  PropertyListT props = {}) {
  constexpr auto L1Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L1_key>(
- cache_hint::uncached);
+ cache_hint::none);
  constexpr auto L2Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L2_key>(
- cache_hint::cached);
+ cache_hint::none);
  detail::prefetch_impl<T, VS, detail::lsc_data_size::default_size, L1Hint,
  L2Hint>(p, byte_offset, mask);
 }
@@ -8931,10 +8931,10 @@ prefetch(AccessorT acc, simd<OffsetT, N / VS> byte_offsets,
 
  constexpr auto L1Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L1_key>(
- cache_hint::uncached);
+ cache_hint::none);
  constexpr auto L2Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L2_key>(
- cache_hint::cached);
+ cache_hint::none);
  detail::prefetch_impl<T, VS, detail::lsc_data_size::default_size, L1Hint,
  L2Hint>(acc, byte_offsets, mask);
 #endif // __ESIMD_FORCE_STATELESS_MEM
@@ -9130,10 +9130,10 @@ prefetch(AccessorT acc, OffsetT byte_offset, simd_mask<1> mask,
 #else
  constexpr auto L1Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L1_key>(
- cache_hint::uncached);
+ cache_hint::none);
  constexpr auto L2Hint =
  detail::getPropertyValue<PropertyListT, cache_hint_L2_key>(
- cache_hint::cached);
+ cache_hint::none);
  detail::prefetch_impl<T, VS, detail::lsc_data_size::default_size, L1Hint,
  L2Hint>(acc, byte_offset, mask);
 #endif // __ESIMD_FORCE_STATELESS_MEM