[SYCL][FPGA] Rename [[intel::disable_loop_pipelining]] attribute func…

…tion metadata (#11372)

Metadata emitted from front-end when an FPGA IPA kernel has the property
pipelined<N> is a function metadata of the form !disable_loop_pipelining
!X, !X = !{i32 0|1}.

This is confusing as the user means to pipeline the kernel/not pipeline
the kernel as opposed to enabling/disabling the pipelining of all loops
in the kernel/function, and this name does not reflect that. This patch
renames the function metadata to "!pipeline_kernel", and to flip the
argument. We believe it may convey information better about what to do
with the kernel when the property is absent.

This was likely caused by a miscommunication with the related loop
metadata that's currently being attached when the loop attribute
[[intel::disable_loop_pipelining]] is used:
{!"llvm.loop.intel.pipelining.enable", i32 0}

---------

Signed-off-by: Soumi Manna <soumi.manna@intel.com>

clang/include/clang/Basic/AttrDocs.td

@@ -3361,11 +3361,10 @@ def SYCLIntelDisableLoopPipeliningAttrDocs : Documentation {
   let Heading = "intel::disable_loop_pipelining";
   let Content = [{
 This attribute applies to a loop or a function. Takes no arguments and
-disables pipelining of the loop or function data path, causing the loop
-or function to be executed serially. Cannot be used on the same loop or
-function, or in conjunction with ``speculated_iterations``, ``max_concurrency``,
-``initiation_interval``, ``ivdep``, ``max_reinvocation_delay`` or
-``enable_loop_pipelining`` attribute.
+indicates whether the kernel should be pipelined or not. Cannot be used on the
+same loop or function, or in conjunction with ``speculated_iterations``,
+``max_concurrency``, ``initiation_interval``, ``ivdep``,
+``max_reinvocation_delay`` or ``enable_loop_pipelining`` attribute.
 
 .. code-block:: c++
 

clang/lib/CodeGen/CodeGenFunction.cpp

@@ -789,9 +789,8 @@ void CodeGenFunction::EmitKernelMetadata(const FunctionDecl *FD,
 
   if (FD->hasAttr<SYCLIntelDisableLoopPipeliningAttr>()) {
     llvm::Metadata *AttrMDArgs[] = {
-        llvm::ConstantAsMetadata::get(Builder.getInt32(1))};
-    Fn->setMetadata("disable_loop_pipelining",
-                    llvm::MDNode::get(Context, AttrMDArgs));
+        llvm::ConstantAsMetadata::get(Builder.getInt32(0))};
+    Fn->setMetadata("pipeline_kernel", llvm::MDNode::get(Context, AttrMDArgs));
   }
 
   if (const auto *A = FD->getAttr<SYCLIntelInitiationIntervalAttr>()) {

clang/test/CodeGenSYCL/disable_loop_pipelining.cpp → clang/test/CodeGenSYCL/pipeline_kernel.cpp

@@ -29,8 +29,8 @@ int main() {
   return 0;
 }
 
-// CHECK: define dso_local spir_kernel void @{{.*}}test_kernel1() #0 {{.*}} !disable_loop_pipelining ![[NUM5:[0-9]+]]
+// CHECK: define dso_local spir_kernel void @{{.*}}test_kernel1() #0 {{.*}} !pipeline_kernel ![[NUM5:[0-9]+]]
 // CHECK: define dso_local spir_kernel void @{{.*}}test_kernel2() #0 {{.*}} ![[NUM4:[0-9]+]]
-// CHECK: define dso_local spir_kernel void @{{.*}}test_kernel3() #0 {{.*}} !disable_loop_pipelining ![[NUM5]]
+// CHECK: define dso_local spir_kernel void @{{.*}}test_kernel3() #0 {{.*}} !pipeline_kernel ![[NUM5]]
 // CHECK: ![[NUM4]] = !{}
-// CHECK: ![[NUM5]] = !{i32 1}
+// CHECK: ![[NUM5]] = !{i32 0}