[SYCL][ESIMD]Fix lsc_slm_block_load test (#12484)

intel · Feb 5, 2024 · e4113f1 · e4113f1
1 parent d286f4a
commit e4113f1
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Showing 2 changed files with 10 additions and 3 deletions.
diff --git a/sycl/test-e2e/ESIMD/lsc/Inputs/lsc_slm_load.hpp b/sycl/test-e2e/ESIMD/lsc/Inputs/lsc_slm_load.hpp
@@ -120,11 +120,11 @@ bool test(queue Q, uint32_t PMask = ~0) {
       uint32_t LID = I % (LocalRange * VL * NChannels);
       uint32_t GID = I / VL;
       bool Pred = (GID & 0x1) == 0;
-      T ExpectedVal = GroupId * 1000000 + LID;
+      Tuint ExpectedVal = GroupId * 1000000 + LID;
       if (TestMergeOperand && !Pred)
-        ExpectedVal = GID + (I % VL);
+        ExpectedVal = sycl::bit_cast<Tuint>((T)(GID + (I % VL)));
 
-      if (Out[I] != ExpectedVal && NErrors++ < 32) {
+      if (sycl::bit_cast<Tuint>(Out[I]) != ExpectedVal && NErrors++ < 32) {
         std::cout << "Error: " << I << ": Value = " << Out[I]
                   << ", Expected value = " << ExpectedVal << std::endl;
       }

diff --git a/sycl/test-e2e/ESIMD/lsc/lsc_slm_block_load.cpp b/sycl/test-e2e/ESIMD/lsc/lsc_slm_block_load.cpp
@@ -18,6 +18,13 @@ template <typename T, bool TestMerging> bool test_load(queue Q) {
   Passed &= test<T, 16, 8, 8, VS, Transpose, TestMerging>(Q);
   Passed &= test<T, 2, 4, 32, VS, Transpose, TestMerging>(Q);
   Passed &= test<T, 2, 4, 64, VS, Transpose, TestMerging>(Q);
+
+  Passed &= test<T, 1, 1, 4, VS, !Transpose, TestMerging>(Q);
+  Passed &= test<T, 1, 7, 16, VS, !Transpose, TestMerging>(Q);
+  Passed &= test<T, 4, 7, 16, VS, !Transpose, TestMerging>(Q);
+  Passed &= test<T, 16, 8, 8, VS, !Transpose, TestMerging>(Q);
+  Passed &= test<T, 2, 4, 32, VS, !Transpose, TestMerging>(Q);
+  Passed &= test<T, 2, 4, 64, VS, !Transpose, TestMerging>(Q);
   return Passed;
 }