Merge branch 'sycl' into sean/rename-external-semaphore-release

intel · Jul 12, 2024 · f54e415 · f54e415
2 parents 264a12f + 73c06af
commit f54e415
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Showing 116 changed files with 3,008 additions and 2,220 deletions.
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -711,11 +711,6 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
                              "__spv::__spirv_CooperativeMatrixKHR") {
           ResultType = ConvertSPVCooperativeMatrixType(RD);
           break;
-        } else if (RD && RD->getQualifiedNameAsString() ==
-                             "__spv::__spirv_TaskSequenceINTEL") {
-          ResultType = llvm::TargetExtType::get(getLLVMContext(),
-                                                "spirv.TaskSequenceINTEL");
-          break;
         }
       }
     }

diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -10553,7 +10553,6 @@ static void getTripleBasedSPIRVTransOpts(Compilation &C,
       ",+SPV_INTEL_fpga_argument_interfaces"
       ",+SPV_INTEL_fpga_invocation_pipelining_attributes"
       ",+SPV_INTEL_fpga_latency_control"
-      ",+SPV_INTEL_task_sequence"
       ",+SPV_KHR_shader_clock"
       ",+SPV_INTEL_bindless_images";
   ExtArg = ExtArg + DefaultExtArg + INTELExtArg;

diff --git a/clang/lib/Driver/ToolChains/SYCL.cpp b/clang/lib/Driver/ToolChains/SYCL.cpp
@@ -1567,6 +1567,15 @@ void SYCLToolChain::AddImpliedTargetArgs(const llvm::Triple &Triple,
         getDriver().Diag(diag::err_drv_unsupported_opt_for_target)
             << "-device" << Target;
       }
+      // ocloc has different names for some of the newer architectures;
+      // translate them to the apropriate value here.
+      DepInfo =
+          llvm::StringSwitch<StringRef>(DepInfo)
+              .Cases("pvc_vg", "12_61_7", "pvc_xt_c0_vg")
+              .Cases("mtl_u", "mtl_s", "arl_u", "arl_s", "12_70_4", "mtl_s")
+              .Cases("mtl_h", "12_71_4", "mtl_p")
+              .Cases("arl_h", "12_74_4", "xe_lpgplus_b0")
+              .Default(DepInfo);
       CmdArgs.push_back("-device");
       CmdArgs.push_back(Args.MakeArgString(DepInfo));
     }

diff --git a/clang/test/CodeGenSYCL/intel-task-sequence.cpp b/clang/test/CodeGenSYCL/intel-task-sequence.cpp
diff --git a/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp b/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp
@@ -123,27 +123,27 @@
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_60_7 -### %s 2>&1 | \
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc -DMAC_STR=PVC
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_pvc_vg -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_vg -DMAC_STR=PVC_VG
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_xt_c0_vg -DMAC_STR=PVC_VG
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_61_7 -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_vg -DMAC_STR=PVC_VG
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_xt_c0_vg -DMAC_STR=PVC_VG
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl_u -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_u -DMAC_STR=MTL_U
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl_s -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_u -DMAC_STR=MTL_U
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_arl_u -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_u -DMAC_STR=MTL_U
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_arl_s -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_u -DMAC_STR=MTL_U
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_70_4 -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_u -DMAC_STR=MTL_U
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl_h -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_h -DMAC_STR=MTL_H
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_p -DMAC_STR=MTL_H
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_71_4 -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_h -DMAC_STR=MTL_H
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_p -DMAC_STR=MTL_H
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_arl_h -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=arl_h -DMAC_STR=ARL_H
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=xe_lpgplus_b0 -DMAC_STR=ARL_H
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_74_4 -### %s 2>&1 | \
-// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=arl_h -DMAC_STR=ARL_H
+// RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=xe_lpgplus_b0 -DMAC_STR=ARL_H
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bmg_g21 -### %s 2>&1 | \
 // RUN:   FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_1_4 -### %s 2>&1 | \

diff --git a/clang/test/Driver/sycl-spirv-ext.c b/clang/test/Driver/sycl-spirv-ext.c
@@ -47,7 +47,6 @@
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_argument_interfaces
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_invocation_pipelining_attributes
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_latency_control
-// CHECK-DEFAULT-SAME:,+SPV_INTEL_task_sequence
 // CHECK-DEFAULT-SAME:,+SPV_KHR_shader_clock
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_bindless_images
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_token_type
@@ -82,7 +81,6 @@
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_buffer_location
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_argument_interfaces
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_latency_control
-// CHECK-FPGA-HW-SAME:,+SPV_INTEL_task_sequence
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_usm_storage_classes
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_runtime_aligned
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_cluster_attributes,+SPV_INTEL_loop_fuse
@@ -114,7 +112,6 @@
 // CHECK-CPU-SAME:,+SPV_INTEL_fpga_argument_interfaces
 // CHECK-CPU-SAME:,+SPV_INTEL_fpga_invocation_pipelining_attributes
 // CHECK-CPU-SAME:,+SPV_INTEL_fpga_latency_control
-// CHECK-CPU-SAME:,+SPV_INTEL_task_sequence
 // CHECK-CPU-SAME:,+SPV_INTEL_token_type
 // CHECK-CPU-SAME:,+SPV_INTEL_bfloat16_conversion
 // CHECK-CPU-SAME:,+SPV_INTEL_joint_matrix

diff --git a/libdevice/fallback-complex-fp64.cpp b/libdevice/fallback-complex-fp64.cpp
@@ -153,8 +153,14 @@ double __complex__ __devicelib_cexp(double __complex__ z) {
     return z;
   }
   double __e = __spirv_ocl_exp(z_real);
-  return CMPLX((__e * __spirv_ocl_cos(z_imag)),
-               (__e * __spirv_ocl_sin(z_imag)));
+  double ret_real = __e * __spirv_ocl_cos(z_imag);
+  double ret_imag = __e * __spirv_ocl_sin(z_imag);
+
+  if (__spirv_IsNan(ret_real))
+    ret_real = 0.;
+  if (__spirv_IsNan(ret_imag))
+    ret_imag = 0.;
+  return CMPLX(ret_real, ret_imag);
 }
 
 DEVICE_EXTERN_C_INLINE
@@ -249,8 +255,9 @@ double __complex__ __devicelib_ctanh(double __complex__ z) {
   double z_imag = __devicelib_cimag(z);
   if (__spirv_IsInf(z_real)) {
     if (!__spirv_IsFinite(z_imag))
-      return CMPLX(1.0, 0.0);
-    return CMPLX(1.0, __spirv_ocl_copysign(0.0, __spirv_ocl_sin(2.0 * z_imag)));
+      return CMPLX(__spirv_ocl_copysign(1.0, z_real), 0.0);
+    return CMPLX(__spirv_ocl_copysign(1.0, z_real),
+                 __spirv_ocl_copysign(0.0, __spirv_ocl_sin(2.0 * z_imag)));
   }
   if (__spirv_IsNan(z_real) && z_imag == 0)
     return z;

diff --git a/libdevice/fallback-complex.cpp b/libdevice/fallback-complex.cpp
@@ -154,8 +154,14 @@ float __complex__ __devicelib_cexpf(float __complex__ z) {
     return z;
   }
   float __e = __spirv_ocl_exp(z_real);
-  return CMPLXF((__e * __spirv_ocl_cos(z_imag)),
-                (__e * __spirv_ocl_sin(z_imag)));
+  float ret_real = __e * __spirv_ocl_cos(z_imag);
+  float ret_imag = __e * __spirv_ocl_sin(z_imag);
+
+  if (__spirv_IsNan(ret_real))
+    ret_real = 0.f;
+  if (__spirv_IsNan(ret_imag))
+    ret_imag = 0.f;
+  return CMPLXF(ret_real, ret_imag);
 }
 
 DEVICE_EXTERN_C_INLINE
@@ -249,8 +255,8 @@ float __complex__ __devicelib_ctanhf(float __complex__ z) {
   float z_imag = __devicelib_cimagf(z);
   if (__spirv_IsInf(z_real)) {
     if (!__spirv_IsFinite(z_imag))
-      return CMPLXF(1.0f, 0.0f);
-    return CMPLXF(1.0f,
+      return CMPLXF(__spirv_ocl_copysign(1.0f, z_real), 0.0f);
+    return CMPLXF(__spirv_ocl_copysign(1.0f, z_real),
                   __spirv_ocl_copysign(0.0f, __spirv_ocl_sin(2.0f * z_imag)));
   }
   if (__spirv_IsNan(z_real) && z_imag == 0)