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[SYCL][NFC] Refresh inline asm E2E tests #12642

Merged
merged 3 commits into from
Feb 8, 2024
Merged

[SYCL][NFC] Refresh inline asm E2E tests #12642

merged 3 commits into from
Feb 8, 2024

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AlexeySachkov
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This PR should improve tests stability and transparency (when it comes to unsupported tests). List of changes:

  • switched from [[intel::reqd_sub_group_size]] to [[sycl::reqd_sub_group_size]] attribute;
  • removed uses of deprecated device::has_extension API: there is no need for that check, because, [[sycl::reqd_sub_group_size]] is a core SYCL 2020 functionality;
  • simplified helpers to remove unnecessary extra arguments which could be inferred otherwise;
  • updated REQUIRES directives to include required sub-group size requirements in there. Adjusted calls to launchInlineASMTest helper to consistently pass required sub-group size in there as well;

@AlexeySachkov
[SYCL][NFC] Refresh inline asm E2E tests
3ac7acb 
This PR should improve tests stability and transparency (when it comes
to unsupported tests). List of changes:

- switched from `[[intel::reqd_sub_group_size]]` to
  `[[sycl::reqd_sub_group_size]]` attribute;
- removed uses of deprecated `device::has_extension` API: there is no need
  for that check, because, `[[sycl::reqd_sub_group_size]]` is a core SYCL
  2020 functionality;
- simplified helpers to remove unnecessary extra arguments which could be
  inferred otherwise;
- updated `REQUIRES` directives to include required sub-group size
  requirements in there. Adjusted calls to `launchInlineASMTest` helper to
  consistently pass required sub-group size in there as well;
@AlexeySachkov AlexeySachkov requested a review from a team as a code owner February 7, 2024 10:26
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github-actions bot commented Feb 7, 2024 •
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✅ With the latest revision this PR passed the C/C++ code formatter.

@AlexeySachkov
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Really don't like what clang-format is suggesting. Considering that this is a test, I've disabled it for that piece of code in 884368c

@AlexeySachkov AlexeySachkov merged commit 2dc080e into intel:sycl Feb 8, 2024
11 of 12 checks passed
@AlexeySachkov
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Post-commit failures on Arc GPU:

-- Testing: 1882 tests, 24 workers --
FAIL: SYCL :: ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg.cpp (802 of 1882)
******************** TEST 'SYCL :: ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg.cpp' FAILED ********************
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 11
/__w/llvm/llvm/toolchain/bin//clang++   -fsycl -fsycl-targets=spir64 /__w/llvm/llvm/llvm/sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg.cpp -o /__w/llvm/llvm/build-e2e/ESIMD/unified_memory_api/Output/atomic_update_acc_dg2_pvc_cmpxchg.cpp.tmp.out
# executed command: /__w/llvm/llvm/toolchain/bin//clang++ -fsycl -fsycl-targets=spir64 /__w/llvm/llvm/llvm/sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg.cpp -o /__w/llvm/llvm/build-e2e/ESIMD/unified_memory_api/Output/atomic_update_acc_dg2_pvc_cmpxchg.cpp.tmp.out
# note: command had no output on stdout or stderr
# RUN: at line 12
env ONEAPI_DEVICE_SELECTOR=level_zero:gpu  /__w/llvm/llvm/build-e2e/ESIMD/unified_memory_api/Output/atomic_update_acc_dg2_pvc_cmpxchg.cpp.tmp.out
# executed command: env ONEAPI_DEVICE_SELECTOR=level_zero:gpu /__w/llvm/llvm/build-e2e/ESIMD/unified_memory_api/Output/atomic_update_acc_dg2_pvc_cmpxchg.cpp.tmp.out
# .---command stdout------------
# | Running on Intel(R) Arc(TM) A750 Graphics, driver=[1.3.28202]
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }...
# |   failed at index 0: 65537 != 1(gold)
# |   failed at index 1: 65537 != 1(gold)
# |   failed at index 2: 65537 != 1(gold)
# |   failed at index 3: 65537 != 1(gold)
# |   failed at index 4: 65537 != 1(gold)
# |   failed at index 5: 65537 != [22](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:23)(gold)
# |   FAILED
# |   pass rate: 99.511% (1221/1227)
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }...
# |   failed at index 0: 65537 != 1(gold)
# |   failed at index 1: 65537 != 1(gold)
# |   failed at index 2: 65537 != 1(gold)
# |   FAILED
# |   pass rate: 99.7555% (12[24](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:25)/1227)
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }...
# |   failed at index 0: 2 != 1(gold)
# |   failed at index 1: 3 != 1(gold)
# |   FAILED
# |   pass rate: 99.837% (12[25](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:26)/1227)
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }...
# |   failed at index 0: 65537 != 1(gold)
# |   FAILED
# |   pass rate: 99.9185% (12[26](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:27)/12[27](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:28))
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }...
# |   failed at index 0: 65537 != 1(gold)
# |   FAILED
# |   pass rate: 99.9185% (1226/1227)
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=33 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int[32](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:33)_t N=[33](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:34) UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=33 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=33 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=33 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=33 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=1 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=2 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=4 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=8 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=16 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=32 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=64 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=12 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=[35](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:36) UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=35 UseMask=true UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 1 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int16_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int32_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=int64_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint16_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint32_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=cmpxchg n_args=2 T=uint64_t N=33 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=1 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=2 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=4 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=8 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=16 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=32 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=64 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=12 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=half N=35 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | Accessor Testing op=fcmpxchg n_args=2 T=float N=35 UseMask=false UseProperties=true
# | 	{ thr_per_group=3 n_groups=7 start_ind=5 use_mask= 0 masked_lane=1 repeat=1 stride=111 }... passed
# | FAILED
# `-----------------------------
# error: command failed with exit status: 1

--

********************
TIMEOUT: SYCL :: KernelFusion/Reduction/group_reduce_and_last_wg_detection.cpp (1882 of 1882)
******************** TEST 'SYCL :: KernelFusion/Reduction/group_reduce_and_last_wg_detection.cpp' FAILED ********************
Exit Code: -9
Timeout: Reached timeout of [60](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:61)0 seconds

Command Output (stdout):
--
# RUN: at line 1
/__w/llvm/llvm/toolchain/bin//clang++   -fsycl -fsycl-targets=spir[64](https://github.com/intel/llvm/actions/runs/7832628628/job/21373300300#step:21:65) /__w/llvm/llvm/llvm/sycl/test-e2e/KernelFusion/Reduction/group_reduce_and_last_wg_detection.cpp -fsycl-embed-ir -o /__w/llvm/llvm/build-e2e/KernelFusion/Reduction/Output/group_reduce_and_last_wg_detection.cpp.tmp.out
# executed command: /__w/llvm/llvm/toolchain/bin//clang++ -fsycl -fsycl-targets=spir64 /__w/llvm/llvm/llvm/sycl/test-e2e/KernelFusion/Reduction/group_reduce_and_last_wg_detection.cpp -fsycl-embed-ir -o /__w/llvm/llvm/build-e2e/KernelFusion/Reduction/Output/group_reduce_and_last_wg_detection.cpp.tmp.out
# .---command stderr------------
# | clang++: warning: argument unused during compilation: '-fsycl-embed-ir' [-Wunused-command-line-argument]
# `-----------------------------
# RUN: at line 2
env ONEAPI_DEVICE_SELECTOR=level_zero:gpu  /__w/llvm/llvm/build-e2e/KernelFusion/Reduction/Output/group_reduce_and_last_wg_detection.cpp.tmp.out
# executed command: env ONEAPI_DEVICE_SELECTOR=level_zero:gpu /__w/llvm/llvm/build-e2e/KernelFusion/Reduction/Output/group_reduce_and_last_wg_detection.cpp.tmp.out
# note: command had no output on stdout or stderr
# error: command failed with exit status: -9
# error: command reached timeout: True

@AlexeySachkov
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ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg.cpp - this should already be fixed by a revert made 10 hours ago
KernelFusion/Reduction/group_reduce_and_last_wg_detection.cpp - for this we have a PR on review already

@AlexeySachkov AlexeySachkov deleted the private/asachkov/refresh-inline-asm-e2e-tests branch May 22, 2024 09:42
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@sergey-semenov sergey-semenov sergey-semenov approved these changes

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@AlexeySachkov @sergey-semenov