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[FPGA][SYCL] Add support for memory attributes on device_global variables #12785

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merged 17 commits into from
Mar 4, 2024
Merged

[FPGA][SYCL] Add support for memory attributes on device_global variables #12785

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38dc2f5
[FPGA][SYCL] Allow memory attributes on non-const device_global varia…
smanna12 Feb 21, 2024
db826f5
Add support for device_global variables on FPGA attributes
smanna12 Feb 26, 2024
5e573c1
Update patch
smanna12 Feb 26, 2024
e45c0b5
Address Review Comments
smanna12 Feb 27, 2024
6eb22a0
Update tests
smanna12 Feb 27, 2024
21d5362
Allow max_replicates attribute on device_global
smanna12 Feb 27, 2024
5f3ea15
Remove duplicate codes
smanna12 Feb 27, 2024
3dad7b2
Add support for force_pow2_depth attribute on device_global variable.
smanna12 Feb 27, 2024
362a72f
Add support for bankwidth attribute on device_global variable.
smanna12 Feb 27, 2024
aa9c847
Add support for more fpga memory attributes on device_global variables.
smanna12 Feb 29, 2024
cf17e1e
Remove duplicate cases
smanna12 Feb 29, 2024
5fad45d
Add more test case
smanna12 Feb 29, 2024
41b79a4
Added missing test case
smanna12 Feb 29, 2024
a314482
Fix existing attributes restrictions
smanna12 Feb 29, 2024
48a15fa
Merge remote-tracking branch 'my_remote/sycl' into FixFPGABug
smanna12 Feb 29, 2024
32ae573
Address review comments
smanna12 Mar 1, 2024
4a4a016
Fix clang format errors
smanna12 Mar 1, 2024
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62 changes: 0 additions & 62 deletions clang/include/clang/Basic/Attr.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2646,50 +2646,14 @@ def SYCLIntelEnableLoopPipelining : StmtAttr {
def : MutualExclusions<[SYCLIntelDisableLoopPipelining,
SYCLIntelEnableLoopPipelining]>;

def SYCLIntelLocalNonConstVar : SubsetSubject<Var,
[{S->hasLocalStorage() &&
S->getKind() != Decl::ImplicitParam &&
S->getKind() != Decl::ParmVar &&
S->getKind() != Decl::NonTypeTemplateParm &&
!S->getType().isConstQualified()}],
"local non-const variables">;

def SYCLIntelConstVar : SubsetSubject<Var,
[{S->getKind() != Decl::ImplicitParam &&
S->getKind() != Decl::ParmVar &&
S->getKind() != Decl::NonTypeTemplateParm &&
(S->getType().isConstQualified() ||
S->getType().getAddressSpace() ==
LangAS::opencl_constant)}],
"constant variables">;

def SYCLIntelLocalStaticAgentMemVar : SubsetSubject<Var,
[{S->getKind() != Decl::ImplicitParam &&
S->getKind() != Decl::NonTypeTemplateParm &&
(S->getStorageClass() == SC_Static ||
S->hasLocalStorage())}],
"local variables, static variables, agent memory arguments">;

def SYCLIntelLocalOrStaticVar : SubsetSubject<Var,
[{S->getKind() != Decl::ImplicitParam &&
S->getKind() != Decl::ParmVar &&
S->getKind() != Decl::NonTypeTemplateParm &&
(S->getStorageClass() == SC_Static ||
S->hasLocalStorage())}],
"local variables, static variables">;

def SYCLIntelDoublePump : Attr {
let Spellings = [CXX11<"intel", "doublepump">];
let Subjects = SubjectList<[SYCLIntelConstVar, SYCLIntelLocalOrStaticVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelDoublePumpAttrDocs];
}

def SYCLIntelSinglePump : Attr {
let Spellings = [CXX11<"intel", "singlepump">];
let Subjects = SubjectList<[SYCLIntelConstVar, SYCLIntelLocalOrStaticVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelSinglePumpAttrDocs];
}
Expand All @@ -2708,17 +2672,12 @@ def SYCLIntelMemory : Attr {
}
}
}];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelMemoryAttrDocs];
}

def SYCLIntelRegister : Attr {
let Spellings = [CXX11<"intel", "fpga_register">];
let Subjects = SubjectList<[SYCLIntelConstVar, SYCLIntelLocalOrStaticVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelRegisterAttrDocs];
}
Expand All @@ -2729,9 +2688,6 @@ def : MutualExclusions<[SYCLIntelDoublePump, SYCLIntelSinglePump,
def SYCLIntelBankWidth : InheritableAttr {
let Spellings = [CXX11<"intel", "bankwidth">];
let Args = [ExprArgument<"Value">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelBankWidthAttrDocs];
}
Expand All @@ -2740,9 +2696,6 @@ def : MutualExclusions<[SYCLIntelRegister, SYCLIntelBankWidth]>;
def SYCLIntelNumBanks : InheritableAttr {
let Spellings = [CXX11<"intel", "numbanks">];
let Args = [ExprArgument<"Value">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelNumBanksAttrDocs];
}
Expand All @@ -2751,7 +2704,6 @@ def SYCLIntelPrivateCopies : InheritableAttr {
let Spellings = [CXX11<"intel", "private_copies">];
let Args = [ExprArgument<"Value">];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Subjects = SubjectList<[SYCLIntelLocalNonConstVar, Field], ErrorDiag>;
let Documentation = [SYCLIntelPrivateCopiesAttrDocs];
}
def : MutualExclusions<[SYCLIntelRegister, SYCLIntelPrivateCopies]>;
Expand All @@ -2760,8 +2712,6 @@ def : MutualExclusions<[SYCLIntelRegister, SYCLIntelPrivateCopies]>;
def SYCLIntelMerge : Attr {
let Spellings = [CXX11<"intel", "merge">];
let Args = [StringArgument<"Name">, StringArgument<"Direction">];
let Subjects = SubjectList<[SYCLIntelConstVar, SYCLIntelLocalOrStaticVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelMergeAttrDocs];
}
Expand All @@ -2770,19 +2720,13 @@ def : MutualExclusions<[SYCLIntelRegister, SYCLIntelMerge]>;
def SYCLIntelMaxReplicates : InheritableAttr {
let Spellings = [CXX11<"intel", "max_replicates">];
let Args = [ExprArgument<"Value">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelMaxReplicatesAttrDocs];
}
def : MutualExclusions<[SYCLIntelRegister, SYCLIntelMaxReplicates]>;

def SYCLIntelSimpleDualPort : Attr {
let Spellings = [CXX11<"intel", "simple_dual_port">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
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let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelSimpleDualPortAttrDocs];
}
Expand All @@ -2807,9 +2751,6 @@ def SYCLIntelPipeIO : InheritableAttr {
def SYCLIntelBankBits : Attr {
let Spellings = [CXX11<"intel", "bank_bits">];
let Args = [VariadicExprArgument<"Args">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelBankBitsDocs];
}
Expand All @@ -2819,9 +2760,6 @@ def : MutualExclusions<[SYCLIntelRegister, SYCLIntelNumBanks]>;
def SYCLIntelForcePow2Depth : InheritableAttr {
let Spellings = [CXX11<"intel", "force_pow2_depth">];
let Args = [ExprArgument<"Value">];
let Subjects = SubjectList<[SYCLIntelConstVar,
SYCLIntelLocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelForcePow2DepthAttrDocs];
}
Expand Down
7 changes: 7 additions & 0 deletions clang/include/clang/Basic/DiagnosticSemaKinds.td
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Original file line number Diff line number Diff line change
Expand Up @@ -12218,6 +12218,13 @@ def err_sycl_attribute_internal_decl
"in an anonymous namespace">;
def err_sycl_attribute_not_device_global
: Error<"%0 attribute can only be applied to 'device_global' variables">;
def err_fpga_attribute_incorrect_variable
: Error<"%0 attribute only applies to constant variables, local variables, "
"static variables, %select{|agent memory arguments, }1non-static data "
"members and device_global variables">;
def err_fpga_attribute_invalid_decl
: Error<"%0 attribute only applies to const variables, local variables, "
"non-static data members and device_global variables">;
def err_sycl_compiletime_property_duplication : Error<
"can't apply %0 property twice to the same accessor">;
def err_sycl_invalid_property_list_param_number : Error<
Expand Down
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