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[SYCL] Add more aspect information for intel_gpu_* in device config file #14188

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merged 13 commits into from
Jul 11, 2024

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jzc
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@jzc jzc commented Jun 14, 2024

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@jzc jzc requested a review from a team as a code owner June 14, 2024 21:03
@@ -160,9 +160,31 @@ def : TargetInfo<"x86_64", [], [], "", "", 1>;

// TODO: The aspects listed for the intel_gpu targets right now are incomplete;
// only the fp16/fp64/atomic64 aspects are listed.
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May be update comment to include SG aspects? Also, is the list of GPUs complete? Thanks

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I agree about SG sizes comment update.

Also, is the list of GPUs complete?

Likely no, we have almost 40 lines describing different Intel GPU architectures in #13976, not counting aliases

I think that we need some kind of an integration test here between clang driver, SYCL headers and device config file. All those places list known targets and we want them to be in sync. However, I wouldn't block this commit by lack of such test, but that is something we need to have going forward. The fact that this file is expanded incrementally is expected, I think

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LGTM. Is this supported by any existing tests? Will we benefit for adding tests here? I am ok with adding test in a subsequent PR.

Thanks

@asudarsa
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Hi,

Any comments about the failing tests?

Thanks

@jzc jzc requested a review from a team as a code owner June 26, 2024 21:06
@AlexeySachkov
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LGTM. Is this supported by any existing tests? Will we benefit for adding tests here? I am ok with adding test in a subsequent PR.

There is a couple of tests: test-e2e/AOT/reqd-sg-size.cpp, test-e2e/AOT/double.cpp that perform E2E testing of the feature.

We won't be able to test every config line, simply because we don't have all that HW in our CI pool. However, we should add a test (I propose as a follow-up PR) to ensure consistency between targets listed in the config file, targets available through -fsycl-targets option and targets known to device_architecture extension - all three should "know" the same list of targets.

defvar IntelBaseAspects = [AspectExt_intel_esimd];
class IntelTarget<string Name, list<Aspect> Aspects, list<int> subGroupSizesList>
: TargetInfo<Name, IntelBaseAspects # Aspects, subGroupSizesList>;
def : IntelTarget<"intel_gpu_pvc", Fp16Fp64Atomic64, Sg16_32>;
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Please also update comment here , instead when one will add a new architecture, llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td will not be updated

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defvar IntelBaseAspects = [AspectExt_intel_esimd];
class IntelTarget<string Name, list<Aspect> Aspects, list<int> subGroupSizesList>
: TargetInfo<Name, IntelBaseAspects # Aspects, subGroupSizesList>;
def : IntelTarget<"intel_gpu_pvc", Fp16Fp64Atomic64, Sg16_32>;
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@dm-vodopyanov dm-vodopyanov Jul 1, 2024

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Why there are no _pvc_wg and other newer architectures? Should we add them?

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I've added some of this missing targets - see here. For these targets, ocloc has them under different names for some reason (e.g. ocloc would not recognize -device pvc_vg), so I had to add some extra handling in the driver. For intel_gpu_lnl_m and intel_gpu_bmg_g21, ocloc does not seem to accept lnl_m or bmg_g21 (or even 20.4.41 or 20.4.1, the numeric values of those architectures) as values for -device yet. It could be that my environment also has an older ocloc version, but either way, I think I will address those architectures in a later PR.

@jzc jzc requested a review from a team as a code owner July 3, 2024 21:23
@jzc jzc requested a review from bso-intel July 3, 2024 21:23
@jzc jzc requested a review from a team as a code owner July 3, 2024 23:31
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esimd changes lgtm and just noting it looks like we need these changes for #14336

@sarnex sarnex requested a review from a team July 8, 2024 19:54
Co-authored-by: Dmitry Vodopyanov <dmitry.vodopyanov@intel.com>
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LGTM. Thanks

@AlexeySachkov AlexeySachkov merged commit f51e43b into intel:sycl Jul 11, 2024
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AlexeySachkov pushed a commit that referenced this pull request Sep 3, 2024
Follow up to #14188 adding LNL and BMG
target info.
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7 participants