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[CI] Remove Doxygen docs from intel.github.io/llvm-docs/ #15482

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Sep 25, 2024
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[CI] Remove Doxygen docs from intel.github.io/llvm-docs/ #15482

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f1141ed
Remove doxygen docs from intel.github.io
uditagarwal97 Sep 24, 2024
7a3e122
Don't install doxygen in container
uditagarwal97 Sep 24, 2024
1997a3b
Update sycl-docs.yml
uditagarwal97 Sep 24, 2024
80c6576
Remove doxygen links
uditagarwal97 Sep 24, 2024
fdbcdd2
Separate out force-push in a followup PR
uditagarwal97 Sep 24, 2024
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10 changes: 3 additions & 7 deletions .github/workflows/sycl-docs.yml
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@@ -1,4 +1,4 @@
name: Generate Doxygen documentation
name: Generate documentation

on:
schedule:
Expand All @@ -25,16 +25,14 @@ jobs:
path: repo
- name: Install deps
run: |
sudo apt-get install -y doxygen graphviz ssh ninja-build libhwloc-dev
sudo apt-get install -y graphviz ssh ninja-build libhwloc-dev
sudo pip3 install -r repo/llvm/docs/requirements.txt
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- name: Build Docs
run: |
mkdir -p $GITHUB_WORKSPACE/build
cd $GITHUB_WORKSPACE/build
python $GITHUB_WORKSPACE/repo/buildbot/configure.py -w $GITHUB_WORKSPACE \
-s $GITHUB_WORKSPACE/repo -o $GITHUB_WORKSPACE/build -t Release --docs
cmake --build . --target doxygen-sycl
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Potentially it can be useful to verify that developers can build Doxygen documentation locally if needed. Currently, we build Doxygen documentation during pre-commit testing w/o deploying the documentation.

I don't have a strong opinion about keeping Doxygen documentation buildable. IMHO, even if broken, it should be easy to fix.
If any of code owners have an opinion, feel free to leave a comment.

cmake --build . --target doxygen-clang
cmake --build . --target docs-sycl-html
cmake --build . --target docs-clang-html
- name: Deploy
Expand All @@ -52,11 +50,9 @@ jobs:
git rm -rf .
touch .nojekyll
yes | \cp -rf $GITHUB_WORKSPACE/build/tools/sycl/doc/html/* .
mv $GITHUB_WORKSPACE/build/tools/sycl/doc/doxygen/html doxygen/
mv $GITHUB_WORKSPACE/build/tools/clang/docs/html clang/
mv $GITHUB_WORKSPACE/build/tools/clang/docs/doxygen/html clang_doxygen/
git config --global user.name "iclsrc"
git config --global user.email "ia.compiler.tools.git@intel.com"
git add .
git diff-index --quiet HEAD || git commit --amend -m "Update docs" -s
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git push -f
git push
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1 change: 0 additions & 1 deletion buildbot/configure.py
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Expand Up @@ -116,7 +116,6 @@ def do_configure(args):
llvm_enable_assertions = "OFF"

if args.docs:
llvm_enable_doxygen = "ON"
llvm_enable_sphinx = "ON"

if args.shared_libs:
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1 change: 0 additions & 1 deletion sycl/doc/extensions/supported/sycl_ext_intel_esimd/README.md
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Expand Up @@ -16,7 +16,6 @@ vectorization is expressed explicitly in the code by the programmer.
Please see the additional resources on the Intel DPC++ project's github:

1) [ESIMD Extension Specification](./sycl_ext_intel_esimd.md)
1) [ESIMD API/doxygen reference](https://intel.github.io/llvm-docs/doxygen/group__sycl__esimd.html)
1) [Examples](./examples/README.md)
1) [ESIMD end-to-end LIT tests](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/)
1) [Implementation and API Restrictions](./sycl_ext_intel_esimd.md#implementation-restrictions)
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14 changes: 0 additions & 14 deletions sycl/doc/extensions/supported/sycl_ext_intel_esimd/sycl_ext_intel_esimd.md
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Expand Up @@ -38,7 +38,6 @@
- [Other restrictions](#other-restrictions)

## Other content:
* [ESIMD API/doxygen reference](https://intel.github.io/llvm-docs/doxygen/group__sycl__esimd.html)
* [Examples](./examples/README.md)
* [ESIMD LIT tests - working code examples](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/)

Expand Down Expand Up @@ -162,7 +161,6 @@ The element type must either be a vectorizable type or the `sycl::half` type.
The set of vectorizable types is the
set of fundamental SYCL arithmetic types excluding `bool`. The length of the
vector is the second template parameter.
See the complete [API reference](https://intel.github.io/llvm-docs/doxygen/classcl_1_1____ESIMD__NS_1_1simd.html#details) for the `simd` class for more details.

ESIMD compiler back-end does the best it can to map each `simd` class object to a
contiguous block of registers in the general register file (GRF).
Expand Down Expand Up @@ -351,8 +349,6 @@ reduction operations are supported:
- maximum
- minimum

See more details on the API documentation [page TODO](https://intel.github.io/llvm-docs/doxygen).

### Memory access APIs

Explicit SIMD memory access interface is quite different from the standard SYCL
Expand Down Expand Up @@ -598,9 +594,6 @@ Many memory access APIs accept offsets as arguments, which are used to determine
actual memory location for the access. Offsets are always expressed in bytes
rather than element units.

See more details in the API documentation
[page TODO](https://intel.github.io/llvm-docs/doxygen).

### Math operations

#### Extended math
Expand Down Expand Up @@ -649,10 +642,6 @@ ESIMD supports the following non-standard math functions implemented in hardware
- Plane equation - `plane`. Solves a component-wise plane equation
`w = p*u + q*v + r` where `u`, `v`, `w` are vectors and `p`, `q`, `r` are scalars.


See more details in the API documentation
[page TODO](https://intel.github.io/llvm-docs/doxygen).

### Dot Product Accumulate Systolic - `DPAS` API

DPAS is the matrix multiply-add-and-accumulate operation performed on limited size matrices/tiles.
Expand Down Expand Up @@ -870,9 +859,6 @@ There are other useful miscellaneous APIs provided by ESIMD.
- Find least significant set bit - `fbl`.
- Find most significant set bit - `fbh`.

See more details in the API documentation
[page TODO](https://intel.github.io/llvm-docs/doxygen).

<br>

### Private Global Variables.
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1 change: 0 additions & 1 deletion ...doc/extensions/supported/sycl_ext_intel_esimd/sycl_ext_intel_esimd_functions.md
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Expand Up @@ -22,7 +22,6 @@ See more general ESIMD documentation [here](./sycl_ext_intel_esimd.md).

## Other content:
* [General ESIMD documentation](./sycl_ext_intel_esimd.md)
* [ESIMD API/doxygen reference](https://intel.github.io/llvm-docs/doxygen/group__sycl__esimd.html)
* [Examples](./examples/README.md)
* [ESIMD LIT tests - working code examples](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/ESIMD/)

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3 changes: 0 additions & 3 deletions sycl/doc/index.rst
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Expand Up @@ -15,7 +15,6 @@ Using oneAPI DPC++ for Application Development
Extensions <https://github.com/intel/llvm/tree/sycl/sycl/doc/extensions>
syclcompat/README.md
FAQ
User API Reference <https://intel.github.io/llvm-docs/doxygen/group__sycl__api.html>
EnvironmentVariables
MultiTileCardWithLevelZero
syclgraph/SYCLGraphUsageGuide
Expand All @@ -26,9 +25,7 @@ Design Documents for the oneAPI DPC++ Compiler
.. toctree::
:maxdepth: 1

API Reference <https://intel.github.io/llvm-docs/doxygen>
Clang Documentation <https://intel.github.io/llvm-docs/clang>
Clang API Reference <https://intel.github.io/llvm-docs/clang_doxygen>
design/CompilerAndRuntimeDesign
design/KernelParameterPassing
design/PluginInterface
Expand Down
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