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2019 03 04 meeting notes
Alexey Bader, Oleg Maslov, Pavel Chupin, Michael Kinsner, James Brodman, Xinmin Tian, Anastasia Stulova, Ronan Keryell, Ralph Wittig, Andrew Gozillon, Victor Lomuller
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Alexey Bader: working on Intel SYCL implementation - https://github.com/intel/llvm/tree/sycl.
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Anastasia Stulova: working on OpenCL C++ front-end in clang. Looking for code unification across C++/OpenCL/SYCL front-ends.
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Ronan Keryell: working on Xilinx' SYCL implementation. Interested in common solution for SYCL implementations e.g. use early device code outlining to get better device code diagnostics.
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Alexandre Isoard: working on clang-based HLS compiler for Xilinx FPGA. Interested in re-using SYCL implementation for HLS.
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Victor Lomuller: working on Codeplay' SYCL compiler - ComputeCPP. Interested in providing feedback on SYCL implementation to help with .
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Andrew Gozillon: working with Ronan on Xilinx' SYCL implementation.
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Pavel Chupin: engineering manager for Intel SYCL project.
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Oleg Maslov: engineering manager for Intel SYCL project.
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Mike Kinsner: working on Intel FPGA and compute programming models including SYCL.
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James Brodman: "the same as Mike except FPGA part" :-).
The implementation available at https://github.com/intel/llvm/tree/sycl is currently passing ~60% of conformance tests and some samples from ComputeCPP SDK.
We plan to start upstreaming with SYCL driver changes, integration SPIR-V translator executable to the Clang toolchain and SYCL device code outlining. Victor: we will need to align on the driver flags to avoid incompatible solutions.
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OpenCL C++ and SYCL front-end compilers code re-use. Current solution applied conservative "approach" by introducing a new SYCL language mode and enabling only part of OpenCL extensions relevant to SYCL 1.2.1. We will look at using OpenCL C++ as SYCL device code language, but might require SYCL spec modifications as OpenCL C++ enables capabilities not supported by existing version of the spec (e.g. generic address space pointers).
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C++ to SPIR-V translation. SYCL compiler adopted solution from Khronos prototype of OpenCL C++ compiler (https://github.com/KhronosGroup/SPIR/tree/spirv-1.1). This solution is described in this document uploaded for review here: https://github.com/intel/llvm/blob/4f37c798c4aef40b9988b7319afa148836397c06/sycl/doc/SYCL_compiler_and_runtime_design.md#integration-with-spir-v-format. In nutshell it includes special agreement between standard library headers, C++ compiler and SPIR-V translator. Ideally we should simplify the approach to lose the coupling between these three components.
- Meetings time. Monday 9am PST seems to be okay for everyone.
- AR Alexey: publicly advertise this working group on cfe-dev mailing list
- AR Alexey: send invitation to Kalray (already done by Ronan)
- SPIR-V support
- Device code outlining: early vs late
- TBD