RISC-V: make parameter registers allocatable

janvrany · May 24, 2024 · 3f5d5e7 · 3f5d5e7
1 parent d312e15
commit 3f5d5e7
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/Tinyrossa-RISCV/TRRV64GPSABILinkage.class.st b/src/Tinyrossa-RISCV/TRRV64GPSABILinkage.class.st
@@ -26,13 +26,13 @@ TRRV64GPSABILinkage >> allocatableRegisters [
  over preserved registers. This might save us a need to spill / reload (preserved) 
  registers in prologue / epilogue for small methods."
 
- ^ self volatileRegisters , self preservedRegisters
+ ^ self volatileRegisters , (self parameterRegisters reversed) , self preservedRegisters
  ] ifFalse:[
  "For non-leaf methods we prefer preserved registers over volatile registers. 
  This might save us a need to spill / reload (volatile) registers at call 
  instructions for small functions."
 
- ^ self preservedRegisters , self volatileRegisters
+ ^ self preservedRegisters , self volatileRegisters , (self parameterRegisters reversed)
  ]
 ]