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1. verilog_iterative_division verilog_iterative_division Public

   This module implements a 32-bit division method that significantly helps to save hardware resources. Compared to a hardware divider that is implemented using CLBs, this method uses five times less …

   Verilog 2 2

2. SimpleCPU SimpleCPU Public

   A very simple implementation of a general purpose 12 bit RISC CPU for educational purposes.

   VHDL

3. vhdl_syntax_checker vhdl_syntax_checker Public

   Xilinx ISE's code editor is quite dated and does not hold up to todays standards. A better alternative is e.g. NotePad++, however it does not have syntax checking functionality. In order to check f…

   PowerShell

4. Network-on-Chip-in-VHDL Network-on-Chip-in-VHDL Public

   Forked from mattbirman/Network-on-Chip-in-VHDL

   VHDL

5. MIPS_CPU MIPS_CPU Public

   Simple VHDL implementation of a simple microprocessor without interlocked pipeline stages

   VHDL

6. FPGA_DSP FPGA_DSP Public

   Jupyter Notebook