samples: basic: blinky: eGPIO PoC

PoC of eGPIO peripheral.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>

samples/basic/blinky/CMakeLists.txt

@@ -2,6 +2,13 @@
 
 cmake_minimum_required(VERSION 3.20.0)
 find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+
+if(NOT CONFIG_BOARD_NRF54L15PDK_NRF54L15_CPUAPP)
+  message(FATAL_ERROR "${BOARD} is not supported for this sample")
+endif()
+
 project(blinky)
 
 target_sources(app PRIVATE src/main.c)
+
+include(ExternalProject)

samples/basic/blinky/Kconfig.sysbuild

@@ -0,0 +1,9 @@
+# Copyright 2023 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+
+source "share/sysbuild/Kconfig"
+
+config REMOTE_BOARD
+string
+	default "nrf54l15pdk/nrf54l15/cpuflpr" if $(BOARD) = "nrf54l15pdk"

samples/basic/blinky/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay

@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		reserved-memory {
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			sram_rx: memory@20018000 {
+				reg = <0x20018000 0x0800>;
+			};
+
+			sram_tx: memory@20020000 {
+				reg = <0x20020000 0x0800>;
+			};
+		};
+	};
+
+	ipc {
+		ipc0: ipc0 {
+			compatible = "zephyr,ipc-icmsg";
+			tx-region = <&sram_tx>;
+			rx-region = <&sram_rx>;
+			mboxes = <&cpuapp_vevif_rx 15>, <&cpuapp_vevif_tx 16>;
+			mbox-names = "rx", "tx";
+			status = "okay";
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led4: led_4 {
+			gpios = <&egpio2 7 GPIO_ACTIVE_HIGH>;
+			label = "Test LED 4";
+		};
+	};
+
+	aliases {
+		led4 = &led4;
+	};
+
+	egpio2: egpio2 {
+		compatible = "nordic,nrf-egpio";
+		gpio-reserved-ranges = <0 6>, <8 4>;
+		#gpio-cells = <2>;
+		ngpios = <11>;
+		status = "okay";
+		port = <2>;
+	};
+};
+
+&cpuapp_vevif_rx {
+	status = "okay";
+};
+
+&cpuapp_vevif_tx {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "disabled";
+};
+
+&gpio1 {
+	status = "disabled";
+};
+
+&gpio2 {
+	status = "disabled";
+};
+
+&gpiote20 {
+	status = "disabled";
+};
+
+&gpiote30 {
+	status = "disabled";
+};

samples/basic/blinky/prj.conf

@@ -1 +1,6 @@
 CONFIG_GPIO=y
+
+CONFIG_IPC_SERVICE=y
+CONFIG_IPC_SERVICE_BACKEND_ICMSG=y
+CONFIG_MBOX=y
+CONFIG_MULTITHREADING=n

samples/basic/blinky/remote/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (c) 2022 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(ipc_service_remote)
+
+target_include_directories(app PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/../common)
+
+target_sources(app PRIVATE src/main.c)

samples/basic/blinky/remote/boards/nrf54l15pdk_nrf54l15_cpuflpr.conf

@@ -0,0 +1 @@
+CONFIG_MULTITHREADING=n

samples/basic/blinky/remote/boards/nrf54l15pdk_nrf54l15_cpuflpr.overlay

@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		reserved-memory {
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			sram_tx: memory@20018000 {
+				reg = <0x20018000 0x0800>;
+			};
+
+			sram_rx: memory@20020000 {
+				reg = <0x20020000 0x0800>;
+			};
+		};
+	};
+
+	ipc {
+		ipc0: ipc0 {
+			compatible = "zephyr,ipc-icmsg";
+			tx-region = <&sram_tx>;
+			rx-region = <&sram_rx>;
+			mboxes = <&cpuflpr_vevif_rx 16>, <&cpuflpr_vevif_tx 15>;
+			mbox-names = "rx", "tx";
+			status = "okay";
+		};
+	};
+};
+
+&cpuflpr_vevif_rx {
+	status = "okay";
+};
+
+&cpuflpr_vevif_tx {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "disabled";
+};
+
+&gpio1 {
+	status = "disabled";
+};
+
+&gpio2 {
+	status = "disabled";
+};
+
+&gpiote20 {
+	status = "disabled";
+};
+
+&gpiote30 {
+	status = "disabled";
+};

samples/basic/blinky/remote/prj.conf

@@ -0,0 +1,3 @@
+CONFIG_IPC_SERVICE=y
+CONFIG_IPC_SERVICE_BACKEND_ICMSG=y
+CONFIG_MBOX=y